Can you help me improve my PCB?

If the netlist specifies that A, B, C and D are in the same (gnd) net, and you have only connected A to B, and C to D, then KiCad shows it as an Error: Missing connection between items. Note that KiCad does not know what your “GND” reference is. It just knows that a bunch of pins with the name “GND” needs to be connected to each other.

Ah yes, I saw these unconnected wires, but when I start cropping the GND (filling), the unconnection errors disappeared

Actually when doing the ground plane it connects all the gnd wires as shown below :

Do I still have to connect the different ground wires to each other using vias?

Ah Thanks for pointing them. I tought that you are talking about other pads, because these ones were connected to each other using the ground plane as you can see in the first images I’ve uploaded… That’s why I’ve no unnconnected wires warning in the DRC!

is it like that or I’ve to do in another way? I can’t figure out how can I add a gnd on the top and connect them all? wire by wire ?

Please read the DRC messages on your own screen. It says 0 unconnected items, and it shows a warning about Text height out of range.

IS the warning okey? can I by pass it ? or can I correct it by changing the dimensions of the text ? the text is small I can see it

Sorry, this pads were not connected at any of images you uploaded in your first post. Not only first post, but all posts until post 24.

In such design (charging/discharging battery) you need not to connect extra these GND pads with vias and GND zone at top layer. But it is worth to learn good practices from beginning.

But look how solid are the current pads of current sensing resistor and how thin is your track you draw that current. Remember: if you do not order a special PCB, the PCB has copper that is only 0.035mm thick.
Your tracks driving MOS Gates (current is zero, zero, nothing) are wider that your track driving the battery discharge current. I would not route track connecting these MOS Source pads under them but out of them were I can use wider track, even if having to route Gate tracks through vias.

If you want to know where from the need to use solid (not interrupted by other tracks) GND zone comes then read the articles I have linked here in 2020:

Do not copy my text that it looks as you have written it. I know where is the end of my text and where starts yours but others can be confused. When you select a piece of someone else’s text you have the option to Quote it and it is inserted into your post with clear info who have written it.

Enter the edition of zone you have placed. You there have layers list at which zone is to be made. Mark checkbox next to F.Cu. Zone will be made also at top layer.
You need not to route this pads wire by wire. I am placing via (using tool from right toolbox) near the GND pad and then connect pad to this via. As you have zone also at bottom you need not even to connect these pads to these vias. But placing via near any GND pad gives for the return currents going through the GND the short connection to good, solid GND allowing each return current to select the lowest impedance way to its source.

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Thank you so much for such great information. Can you please tell me why in that case of (charging / discharging battery) we don’t need to connect extra GND pads?

Thanks for pointing out how the difference between the tracks and pads width, it’s now 0.4mm. I wanted to add more tickness for the track that is sensing the current and goes to the IC (SRP and SRN) to decrease the resistivity and get a clean measure signal but I think the pads are pretty small for such tracks…

The track that passes through the mosfet was also corrected. I will read theses articles as well.
I also changed the 1watt resistor with the ones that have the right footprint.

here is the new PCB, any advice to improve more ?

Read these pdfs.
A surface surrounded by a current and its return current determines the disturbance emissions by high switching currents. Good connection to GND ensures the smaller surface.
In your application you don’t have fast switching currents.

Because here you don’t need wide tracks. Current determines track width and here you have tiny currents.

In my opinion using vias make it being worse and not better (I was writing about using vias for gate connections).

`[quote=“Piotr, post:31, topic:52219, full:true”]

In my opinion using vias make it being worse and not better (I was writing about using vias for gate connections).

Like that ?



Have in mind that plating in via has in theory 0.018mm. I suppose in center of via (PCB thickness center) it is less.

Too high current can evaporate the track or via. You don’t have very high currents (I understand 0.1A is max).
I am using 0.25mm tracks for standard signals, 0.2mm tracks if IC has pads with 0.4mm raster, but for current tracks (100…300mA) I use 1mm tracks as my standard (why test the limits of track strength if you don’t have to).

Thank you so much for the clarification, I did now know that high current can evaporate thick track or vias. Actually the charging current can achieve 2A. But why are you using 1mm tracks for 300mA? isn’t to low current for such width tracks ?

For track there is no such thing as too low current.
If I were using 0.25mm track to carry 300mA at 10cm distance I would get 60mV voltage drop at this track.
Now imagine something that takes 300mA pulses. Between pulses voltage is 3.3V. When each pulse starts voltage drops down to 3.24V to get back to 3.3V after pulse. I don’t like when supply voltage has its own life.

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Does it mean that the more I increase the track width, the more the current get less resistance which leads to less voltage drop? is that true?

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Yes, that is correct. Copper has a specific resistance, and when you make the track twice as wide, the DC resistance halves, just like when you put two resistors in parallel.

But each track also has some inductance and capacitance to anything nearby. For your shunt resistor (R10) you use 4 wire measurement, so the resistance of copper tracks is not a part of the measurement. Decoupling capacitors are needed for digital IC’s because they have very short, current peaks at the moment the IC switches it’s output.

A part of PCB design is to find a good compromise between these (and several other) factors. You have to know what is important, when it is important, and when you can neglect some things.

Thanks for the clarification.

But why the resistance of copper is not a apart of the measurement since I am using 4 wire measurement ? In fact, two wires are used for measurement while the other ones allow the current to flow from + to -.

I already sort of suspected you did not know what you drew in your schematic and probably copied something. Do some research on 4 wire resistance (or current) measurement and read the datasheet of the IC’s you are using. Such stuff is essential to doing anything non-trivial with electronics.

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Actually, I’ve already my shunt datasheet but there was no such information!

The datasheet you link to suggests this:

So why are you doing the weird 4 pad thing?

And for the rest, I would not expect a datasheet for a resistor to have a long explanation of how 4-wire measurements work. Part of becoming proficient with electronics is to learn where and how to find the data you are interested in. And it’s all so easy to find on the 'net these days.