Can a single schematic pin connect to multiple footprint pads?

Is there a way to assign multiple footprint pads to a single pin in a schematic symbol? For example, assign multiple pads with numbers 11, 23, 32 and 44 of a PQFP footprint to a single VDD pin in a schematic symbol? I thought this was possible, but Google hasn’t turned up anything and neither have the eeschema or pcbnew manuals.

What is the use case for this kind of assignment? Looks like dangerous thing to do: the schematics risks to become too cryptic when you do this I believe?

On 11/08/2014 10:20 AM, Alexei Dolganov wrote:

Dolganoff

November 8

What is the use case for this kind of assignment? Looks like dangerous thing to do: the schematics risks to become too cryptic when you do this I believe?


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Not exactly an answer to my question, but here's a reason for you:




Many high pin count devices have multiple grounds and power pins.
Why connect fourteen pins to ground when you can do it with one? It
actually reduces the chances of error because there is less chance
of missing one of the grounds or assigning it to the wrong net.
2 Likes

Actually, in majority of the cases you have to connect all those pins to the ground (or to the power) externally.

It is possible I’ve totally misunderstoud your question though :smile:

I understand what you’re trying to do, but as far as I know this style of pin numbering is not possible in KiCad. The pin element can only contain one pin reference.

Thanks, Nathan. Yes, I found the pin number field takes only a maximum of four characters so it definitely wouldn’t process a list of pin numbers.

Just to close the loop on this issue, I did find a technique for doing this on another forum:

  1. In the symbol, create as many identical ground pins as there are ground pads on the device package. (I’m just using GND as an example here. This works for any repeated pad on the package.)
  2. Assign one of the package ground pads to the pin number field of each ground pin in the symbol.
  3. Take all the ground pins and place them at the same coordinate in the symbol drawing, i.e. stack all the ground pins on top of each other.
  4. For all the ground pins except one, edit the pin properties and uncheck the visible box. This will leave only one of the ground pins visible when the device symbol is placed in a schematic.
  5. When the device symbol is dropped into a schematic, just attach the ground to that single, visible ground pin. eeschema will attach the ground net to both the visible pin and all the invisible ground pins. Hence, one connection in the schematic gets all the ground pins of the device connected to ground.

This technique works for all types of repeated pins except for no connects (NCs). If you do this with multiple NC pins, then they will all be connected to each other even if you don’t attach a net to the single remaining visible NC pin. If the NC pins are actually supposed to be left unconnected (and not tied high or low), then this is not what you want. The way I handle NC pins is just to leave them off the symbol entirely so that nothing can ever be connected to those package pads.

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For other needs like this, you can number multple pads in the footprint with the same number which helps for power packages like D-Pak and TO-220 where the tab is continued to pin 2.

1 Like

On 11/13/2014 2:57 PM, Adam Shea wrote:

As far as I have seen this is a very important feature which is missing from KiCAD. When people like me who usually work with controllers and processors try to design a schematic, thy face this in KiCAD, that’s why mostly designers prefer the older CAD software because they don’t have these restrictions. Some CAD software let you configure such options regarding the restrictions and warnings in their configuration and I think KiCAD should add that as well.

circuit assembly

I would solve your issue differently. I recognize that different strokes for different folks so my solution might not be appropriate for you.

The reason for my approach is that I want to be able to find all pins of a physical part on the schematic so when later I’m troubleshooting the circuit I don’t have to wonder why a specific pin is or isn’t conected. (I NEVER use hidden pins on physical components. They are a bane to the way I use schematics.) But I also don’t want a bunch of disorganized and extraneous pins cluttering up the intent behind the circuit described in the schematic.

What I do for multiple power and ground pins (well, I do this for all my IC’s power and ground pins to get the power section away from the signal section in the schematic) is to make another “gate” that has just the power and ground pins. I discovered by experimentation that KiCAD does allow for different “gate” representations (U1A, U1B, etc) to have different pins and graphical symbols. I picked up this trick by looking at schematics for Amiga computers. That way one can put the bypass caps next to the appropriate pins in the schematic and it is obvious when reading what are bypas caps and what are impedance biasing caps by where they are in the overall schematic organization. This does take the discipline to use all the gate representations of all parts in the schematic. I was trained to always show unused gates anyway (how else do you tie their inputs to gnd or power?) so it usually isn’t an issue for me to make sure I have all parts represented.

Also, I usually group the pins on the schematic by function, not by numerical order. So for unconnected pins I can either use yet another gate representation, or use an unused section of the main function gate. KiCAD does have a pin-type called unconnected so you can represent them, but it doesn’t allow you to connect nets to them. The symbol for an unconnected pin actually looks like putting a no-connect symbol on a regular pin, except the X is slightly smaller.

For the case where I have a component with a shielded body and/or solderable mounting tabs, like connectors, SD sockets, etc I use a single pin numbered 0 for those, and in the footprint all the shield/mounting pads are numbered 0. This allows me to, for example, use a single generic schematic symbol for a USB connector and then choose the appropriate footprint for the actual physical part number that I end up using on the board. It doesn’t matter how many shield/mounting tabs the connector uses as long as it is at least one.

4 Likes

Thank you SembazuruCDE for sharing your tricks. They are very helpful.

thx, very useful ! I have a similar problem now, with bga GNDs.
Actually, I just spent some time to figure out what is the best for me. I decided to rename one pad to gnd, and move the rest to the same pos. But :slight_smile:
Just wondering , how can I move/edit pins later, if I move more than ten pins to the same coordinates.
Because it looks to me, kicad user interface only displays ten items in the context menu, so there’s no easy way to select i.e. my gnd pin (because it is ordered in alphabetical order).
Yeah, this can be managable by knowing all of the editor behaviours…

It would be nice to have some general solution for this in ki-cad. I can imagine some in-middle list/interface between pcb modul(s) and schematic lib(s), which one could connect pin to nets, net to pads or simply pins to pads… Especially for mcu’s it would be reasonable, becasue the package and the chip pinout can be similar but not the same in particular chip family…

I tried another way that might work: Add some internal layers to the pcb and draw the internal connections there. Later, just omit those layers when sending the gerber files to the production house. Thoughts on that?

1 Like

Dave,

Thank you so much for your persistence in finding the right answer and posting it as reply to your own question. That was exactly the right information I needed. In my case (I am on old engineer, but a newbie at KiCad) I was trying to tie the physical return pins of an RF connector together to the same ground pin on the schematic. You showed such kind-hearted patience to the folks who replied to you!

The method Devbisme described back in 2014 is called “pin stacking” in KiCad and is part of the KLC (KiCad Library Convention)

And just below that, in paragraph s4.4 there are some recommendations for handling NC pins.

Thanks! (I don’t come here as frequently as I used to.)

Thanks you sir, this is amazing.
One more use case, on a connector header I have multiple pins connected to GND and to power lines - this helps a lot to keep the schematic clean.

I do prefer to keep my schematics “clean” and put extra effort in it.
One of the goals of a schematic is to provide good documentation.
If your circuit breaks down, or someone else has to service your product, then they want to be able to see where that pin 42 of that connector is connected to! I never hide pins of any connector, but always show, and connect them on the schematic.

2 Likes

here’s what SamacSys serves, that’s what they always do to piece together oddly-shaped pads.
image

There’s nothing clean about using multiple pins for one pad in this case, and I feel like this will always be a complete re-do.
image