Board house DRC Templates

Hi Folks-

I’ve been collecting a few templates[1] that make for good starting points when targeting manufacturing with a specific board house. These collect DRC rules as well as user trace widths, basic setups and the like. They can help ensure your layout is compatible with your favourite manufacturer.

To use these, you place them in your user templates directory:

I have received updates from OshPark and Aisler, so these are somewhat verified. If you don’t see your favorite board house here, let me know and I’ll reach out to see if we can make one for them.



I recently found out that some assembly houses also have unpublished specifications.

And, I don’t know Github, so I don’t know if I can understand what you have created.

ON EDIT: What do you have for the line thickness of the Edge_Cuts_Layer for the OSHPark Template?

You can download from there as a zip file.


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It’s a bit difficult to find values for pcbway. Note that even in the quick-turn option they have:

Min Trace Min Trace Min Spacing 0.1mm/4mil Min manufacturable trace is 4mil(0.1mm), strongly suggest to design trace above 6mil(0.15mm) to save cost.

The values in the template aren’t the cost-effective ones.

Also they have new value table for Standard PCB capabilities:
Normal process; Medium difficulty; High difficulty (Non-standard review; Unable to make).

It’s fun to try to decipher that table.

How do I apply a template?

After placing the files in your KICAD_USER_TEMPLATE_DIR, you can make a new templated project by selecting this button:


Thanks. Is there any way you can parameterise the paper size for those of us who live in ISO paper size countries?

Beware that the DRC rules get MUCH coarser for 70um/2oz 2mm boards

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These kind of board templates were wished for, but now when Seth actually made some, they show the limits of KiCad. Taking care of changing variables would require more complicated system for defining minimum values. There are also some values which could exist but don’t exist now.

For example - using the actually realized values as minimum values of silkscreen text isn’t necessarily the best solution. It would be better to have separate minimum values for DRC, and larger optimum values in “default properties for graphic items”. Like there are separate values for minimum track width and actual default track width.

Manufacturers often have different values for inner and outer layer copper, too

And now there’s no minimum for copper clearance in KiCad (is there a reason for that?).

DRC has no silk line with check right now. If these templates are intended for v5 then this is as good as it can get.

Yes of course. That’s why I said “they show the limits of KiCad”.

Unfortunately there are no easy fixes for all manufacturability or other similar issues. The problem begins with manufacturers who define things very differently, and continues with the industry’s lack of any formal way of communicating these values. And the manufacturability problems themselves are of course complex, like the above mentioned copper thickness which affects other values, or hole-to-hole clearance which may be affected by hole size.

The rules and the corresponding UI in any EDA are necessarily a simplification. What is important is that the user would be aware of the possible issues and doesn’t trust the default values blindly but always gets familiar with actual recommendations and rules of their manufacturer.

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I can now tell you for certain that those are “Trade Secrets” for a particular assembly house in the USA, and I highly suspect others are very similar “Trade Secrets” for board manufactures also in the USA. If the process is not “Turn-Key” then the individual agency creating the board files is also responsible for additional elements of the Design for Manufacturing Process in KiCad.

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