Better way of routing tracks?

Do you have picture example so I understand better?

“tracking layers”

What is that?

A PCB layer for routing tracks.

(davidrsb mentioned GND layers, and that is another use of PCB layers)

Now I’m still wondering about:

Is that a spacer that is somewhere between thick and thin, or is it a spacer with built in intelligence?

:rofl:

Layers of enlightenment.

:sunglasses:

I think 4 layer PCB price is about 2 x 2 layer price so stacking 2 2 layer gives you little or nothing.

The advantage of second 2 layer PCB I would see in case with Dtypes with short pins not reaching the second PCB - there you will be able to routing not disturbed by Dtypes. You can make ‘vias’ with pin-headers to connect between PCBs. But I don’t know if the end effect will be interesting or not.

I started from the beginning, with the Shield for Pokeys and Arduino I / O cards. But is not satisfied.

I want to make the shield as small as possible to save space on the main circuit board.

I want the connection between the shield and the main PCB to be D-SUB as you can see.

This is so that you can move I / O cards anywhere with the help of a cable.

Anyway, I’m not happy and I’m not getting it right.

All recommendations are welcome.

I attached the project:
Test.zip (962.1 KB)

Aahhrrggg…
Another test poject.

I did a bit of tinkering.
I started by rotating the PCB, so it’s in portrait mode. This makes much better use of the average monitor.
I placed pin 1 of one of the D-Sub ronnectors on (127, 127), because that is compatible with both metric and that other grid.
Then I deleted about 30% of the tracks to make some room.
Fixed the outline by snapping endpoints together.
Did a bit of routing…
There was plenty of room to route the PCB, so I increased track width to 0.35mm, and a bit wider for power. I also increased the via size a bit. (I may have forgotten to update some existing via’s)
I added some net classes for the wider tracks.
Then I moved some things around to create something somewhat resembling a GND plane, but this PCB is just wiring.

It can still need some more cleanup, but I left some more for you to do :slight_smile:
Edit: .2 version, did some more cleaning.
Edit: .3 version. I made an error, the annular rings of the via’s were too small. Fixed.
2022-05-27.3_PoKeys_Test.zip (486.9 KB)

This board is an antenna.

Can you explain better becouse it’s only one tenth of the hole setup.

I just want to tell everyone that you are an absolute genius!

I attach the picture of your result compared to mine!

This is mine:


This is the “paulvdh” version:

It is clear that you know this. From now on, I will listen to everything you suggest, although I always question. :blush:

I also have to ask how did you start?

Let’s say with pin 1 on the upper d-sub.

How did you choose what to drive on the upper layer and the lower layer.

I also think it has gone wrong. D-sub it should point downwards not upwards towards the arduino.

How can I change this without ruining your whole design.

Best regards Jacob!

I had a look at the Pokeys57 yesterday and I thought it had built in I/O hardening / filtering, which seemed logical as the board had screw connectors for (longer) wires.

Just now I had a bit of a closer look but I could not find a real schematic, but I did find a bit bigger picture of the version without connectors:

It looks like wires from the uC go directly to the I/O connectors, which is indeed a bit of a disappointment. I did think a bit about suggesting some protection / filtering and even an SMPS circuit to make a local low voltage, but I mostly did a bit of routing without thinking much about it.

So what would you suggest? Some pi filters? Ferrite beads? TVS diodes?
I also thought about going to a 4 layer PCB with full GND plane(s), but what does that help if you put 2 meters of cables on those D-Sub connectors?

Huh?

Jag måste också fråga hur började du?
Låt os säga med pin 1 på övre d-sub.
Hur valde du vad du ska köra på övre lagret och undre lagret.
Jag tror också att det har blivit fel. D-sub den ska peka neråt inte uppåt mot arduino.
Hur kan jag ändra detta utan att förstöra hela din design.

I also have to ask how did you start?

You always start a PCB by setting up design rules. How wide do you want the tracks? How much clearance? Ideally you select a PCB manufacturer before that, and you use their recommendation, but add some margin. Make the tracks a bit fatter and a bit more clearance, because what they put on their websites is often their absolute minimum.

Here are the design rules from Aisler:

Making tracks on an existing PCB wider is a bit of a pain often, but I was in the mood for a bit of puzzling.

Let’s say with pin 1 on the upper d-sub.
How did you choose what to drive on the upper layer and the lower layer.

It starts by getting some overview of where the wires go, and this determines part placement. You already did a pretty good job there. I often start with the short tracks, because else they have to make big detours if you route other stuff between them. Then, when you’re drawing the longer tracks you will find that other tracks are already in their way. Don’t just go around them, but always have a look if that other track can be moved a bit so it’s not in the way anymore, and this starts from the very beginning. When you start making detours, you use up PCB area, which will get you into trouble later.

Pushing tracks to another layer to make room for another track is also quite common. Take for example all the tracks from P7. I first right clicked in the selection filter and selected “only tracks”

image

Then drew a box around those 8 tracks, pressed e for edit and changed the layer to B.CU.

When a PCB is fully routed, you’re also not finished yet.
PCB Editor / Tools / Cleanup Tracks & Via’s does what it says and is useful.
PCB Editor / Inspect / Net Inspector also lets you quickly highlight each net (or a group of nets) and this shows you quickly if any nets make big detours.

I also think it has gone wrong. D-sub it should point downwards not upwards towards the arduino.
How can I change this without ruining your whole design.
You can’t. Moving those connectors by any significant amount will force you to redo nearly half of all PCB track segments.

I would prefer having all the connector surface mounted and placing a GND plane on the connector side while avoiding as much as possible having traces on the GND side.

Having signals traces overlapping each others on top and bottom is a big trap.

If you go 4 layers, all your problems will be resolved and you could ensure a better EMI figure. If the board is a one time project (not mass produced), go for 4 layers. It costs more yes, but it costs less than having weird behaviors and having to redo the board.

Filters and beads will get you out of trouble but it costs more and it’s harder to design.

Every youtube clip I have seen is saying to not have surface monted conectors?

Does this mather when using on or off on Pokeys or Arduino? Analog signal?

I want the PCB to handel PWM for future proofing, so in the future if ther is PWM I/O cards and the simulator suports diferant light intensetys, my PCB should be able to handle this.

I am not going for mas production. But how should I do if going for a 4 layer board. Have never done that.

Is that realy nessesary for the type of signal Pokey or Arduino will send?

Yes because surface mounted connectors can unsolder quite easily under repeated constraints. Surface mounted USB are a nightmare to reflow too, meaning a lot of small devices fail at the first use if it’s not done properly.
But again this is a mass production issue. For a one time board, and if you have to stick with two layers, you don’t really care.

Any switching signal will have high frequency content if they are unfiltered (even if it switches only once a day). And the return current of high frequency signals tend to follow the trace. If you do not offer a return path (GND) close to the signal trace, then this return current will pass by anything it could couple to (other signal traces and pins, air, etc…).
Same thing goes for interference coming to the board. If your trace is far from its ground, you have an antenna and you will get offending signals at your MCU pins.
So, two option; either you make the signal such that it does not have HF content (filter) or you make the board such that HF content stays on the board (good return path).

If you want clean PWM you need a clean ground path for every signals.

Don’t look at Arduino boards for reference in routing, they are quite badly routed and very susceptible to EMI actually.

Search Rick Hartley on youtube for example.

You want guidelines about the design or the specifics about how to do it in Kicad?

Well, it depends on the signals, but thos MCU are well enough to create an EMI mess.

I did an attempt to stitch the GND plane together, here it’s highlighted:


So all connectors are both surrounded by GND and GND is connected though the middle of the connectors. Track length is about 3 to 5cm and that would need quite high frequencies to be an effective antenna.

Going to 4 layers and GND planes is not going to help if the GND pins of the connectors are far away. I do notice now that the top D-Sub connector does not even have a single GND pin. That sure does look suspicious, but it’s not my design, I don’t know what is going on.

But overall, microcontroller pins are quite fragile for anything ESD related to accidental over voltages. I am more concerned about this then about the EMC. It also “just has to work”. (I assume) It’s a “hobby” PCB and it’s not going to have to pass regulations.

Some other unknowns:

  • Is there shielding around the D-Sub cabling?
  • Are there metal enclosures surrounding this thing.
  • Metal panels in the equipment of the flight simulator?
  • Is there slew-rate limiting (and enabled) from the LPC processor used on the Pokeys57?

I also assume that the PMMA back plate with all the adapter boards (and at least 3 pokeys) already did work, and although I agree this PCB is not ideal, it’s a lot better then the wiring mess in the picture shown earlier in this post.

I realy have to dig in to your answer to understand.

But I saw that the 37 pin male d-sub conectors is still facing the wrong way? Wrong side of the board?

Some are some are not. But not connected to ground I think. But that could be changed because most of the cables hav shield. If you really think that its nesseary.

[quote=“paulvdh, post:35, topic:35831”]
Are there metal enclosures surrounding this thing.
[/quote

Blockquote

You could say that. I don’t think most of it is grounded. Paint between panels and so on. Also the backside of the instrumentpanel is som kind of advertising material made of 2 layers of thin aluminum and plastic between. So you could Cal that metall enclosed with some imagination. But the top is wood so that have to be reworked if I it is a factor to consider.

Now idé what this means?

You could select bothe in the pokeys software and flightsim software if I want fast communication.

Also I just placed the 37 pin d-sub conectors wher it fitted. I have not messuered a perfect placement. For examel a exact valu between them. Or centered them on the card. The same thing with the pokeys footprint.

So this could be of a bit.

With this help I got now I got new energy, maybe it is good to make a perfect placment of those connector.
, pokeys and d-sub?

And what would be the perfect placement. Considering the tracks och the big pcb?

If you have SMD connectors and place GND on the connector side than you have to start each track from via.

In 1995 we (I with my brother) designed an education microcontroller system. We had a connector to use different attachments. There were 20cm flat cable to connect them. Such cables were commonly used those times to connect HDD and FDD in computers. One of attachments was the small PCB with socket to experiment with EEPROM programming. Everything worked.
10 years later suddenly it stopped to work. After a day spend on searching a problem (when you connect oscilloscope probe to any wire problem disappeared) we found the reason. The reason was that EEPROMs we got (the same manufacturer and type as previously) were manufactured on a more modern line (dense process saves them money). More modern (smaller) process means smaller internal capacities, faster output slopes and inputs responding to shorter pulses. When EEPROM output changed state (faster than before) from 1 to 0 it gave the occurrence of a very, very short pulse (oscilloscope probe capacitance eliminated it) at the CLK EEPROM input (wires were adjacent in cable) that was enough for EEPROM to interpret it as a valid clock pulse. Adding filter at EEPROM output or at CLK input solved the problem. We added both to prevent future problems as well.
Nowadays, all elements are produced on modern and modern lines (saves money). The datasheets list the maximum slope times, not the minimum ones. One has to assume that the slopes can be much faster than these datasheet maxima.

I prefer to implement both.

You should use one of internal layers as GND and one as VCC (or other power signals). You should have some 100nF capacitors connecting VCC and GND. You should route signal lines at top and bottom. That way each signal has a return path for HF at adjacent layer (VCC or GND). The best would be to route each track at one layer only and if need to use via than near it there should be capacitor connecting VCC and GND (when you have via the return current have to jump from gnd to VCC or vice versa). One such capacitor can serve several vias near it.
I don’t use 4 layers yet. At my PCBs I route tracks only at top, and I have whole bottom used as GND. I am intensively using the possibility of almost any use of the different legs of the processor to avoid having to cross tracks. If I really have to cross then I prefer to use 0R then to break my GND continuity. I typically need 0…3 0Rs at PCB.

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That depends on the routing topology. It’s not the GND discontinuity that causes troubles, it’s the HF current loop area that should be minimized. It’s not a big deal to have a small jumper routed on the GND plane if the return currents will not have to go through much longer path.
I usually try hard to avoid routing on the BOT GND plane, but in case of few jumper connections I take care not to introduce big loop areas for other traces.

As always the devil is in the details. For example I had to jump with VCC over 7 digital lines (fast SPI + some control signals). So … one jumper for VCC line or 7 jumpers for digital lines or other combinations. For HF the better would be 7 jumpers located such to left a place for GND fill between them as you don’t have HF at VCC (if you have enough capacitors at it). 7 distributed jumpers occupies space. I used 2 x 1206 0R at VCC line jumping over 4 + 3 tracks. I placed them not in serie but with their connected pads next to each other so I needed less space between 4+3 lines.

I use microcontrollers in TQFP. I go with VCC under it and distribute the stars through the corners and VCC pins. That will not work for QFN so for QFN I plan to use 4 layers.