Better way of routing tracks?

Hi All!

Painfully slow I go forward, but I am not tohappy with the routing off tracks.

If anyone have som tip, picture video, how I could rout tracks?

Why do you change layer if there are many tracks that can be routed without actually changing the layer?

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Is it painfully slow because of some bug in KiCad, or just because it’s so many tracks?
(Recently a bug was reported that KiCad itself became very slow for some people).

Running tracks parallel over long distances creates a lot of crosstalk. If that is a problem depends on your signals. If your SUB-D connectors have meters of flat-cable on them, you’re going to have lots of crosstalk anyway. You can reduce crosstalk (between any two tracks) by choosing a different order for the vertical sections. This also changes the long staggered rows of via’s into a sort of squarish area which is more compact. You will use the Push & Shove mode a lot if you do this…

In PCB design, footprint placement is an extremely important step. On your PCB I see only connectors connected to PCB tracks, and then going to somewhere off screen. if you also place those connectors off-screen you don’t see them. Euhm, change that into: If you place each of those connectors near to whatever those tracks go to, then you do not have to run all those tracks all over the PCB. The majority of the tracks from each connector can probably less then 5cm.

This is also a very naive approach:

The first thing I see that you first break out the “CP_CHRONOMETER” to the south, then go west before going north and around the “SIXPACK”.
Why not just go North directly?
Your design rules allow for a track between two pins, so you can even break out the “SIXPACK” directly to the north on one side of the PCB, and then also break out “CP_CHRONOMETER” directly to the North too but on the other side of the PCB and then sneak half the tracks in between the pins of the “SIXPACK” connector. But I still think it’s a bad approach overall. Your primary target should be to place the connectors close to where the tracks are going to reduce the overall length (and therefore PCB area) used for those tracks.

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I didn’t know until recently that having different layers for east/west and north/south was a thing.

EDIT: But yeah, I look at the top layer of a modern PC mother board and they don’t do these arbitrary level changes. But then again, before I started learning circuit board layout, those meandering tracks were a head scratcher. :wink:

It was very common in the '80-ies with big PCB’s which have lots of TTL IC’s connected to each other. It is a very simple way to keep overview and not go mad. In those days there was no Push & Shove. Some autorouters also follow this method (or have an option to do so).

I don’t know the OP’s overall level of experience, but yeah, the more he can share the more the community can help. The more you learn about PCB layout it seems the less you know. The solution might not be in that small piece we see.

Which reminds me…

The Ratsnest is quite handy during the footprint placement and also to a lesser extent during routing, but you have to learn to see through it’s “messiness” I see no ratsnest lines on the screenshot and wonder what it is that I do not see.

I (think I) see some net names on the relays but for the SUB-D’s I only see a GND on the mounting holes.

The default KiCad via size 0.8/0.4 is a bit large. The low cost fabs can manufacture a little smaller, which makes these big layer changing corners much easier. I use 0.6/0.3mm

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I basically want to replace this.

A lot of cables. Use 4 I/O cards (arduino mega) to interface flightsim things. So in the top of the pcb Ther will be 8 37pole D-sub, in the bottom one d-sub for each panel and 1 output for each panel.

So it is a kind of mega shield you cold say.

The pcb will be Something like 43x29 cm.

Very big. But eaven that is a problem with space.

Bothe I think.

Don’t understand exactly what you mean?

But I use D on the keyboard to move tracks.

Reason for this is, that I want the outputs to go to left to right out to the cables that connect all the panels.

May be I should say that it is 54 IO per card I will be using.

So 54x4= 216 inputs. I use dual 37pole for each I/O.

Threw that I also will Feed 5V to each card.

108 outputs, 2 of the cards will feed ULN2003A chip threw dil sockets, that in turn will feed relays, leds, or bulbs, and also stepper motors.

It is almost starting to get to complicated for me.

Forget about the crosstalk. It’s not relevant in this case.

The wold is full of compromises and choices to make. Right now your PCB is full of big connectors which are spaced very illogically from a routing point of view. Both the connectors and the long PCB tracks between them take up a lot of PCB area.
A bit similar with your IC’s and relays. I guess you have something like 74hct shift registers with ULN2803 drivers for the relays, but right now there is a lot of distance between the IC’s and the relays, so your drive signals have to go past the connectors in the north-east, and the relay contacts also have to be routed back. This is simply not going to fit on a dual-layer PCB. PCB’s have to be optimized to reduce the length of the PCB tracks, or you have to go to a 4 or mabye even 6 layer PCB to get this routed.

I’m trying to get an overview here.
So you’ve got around 600 connector pins and 300 wire connections between them.
How many of those connections are only between the connectors, and how many actually connect to the electronics?

Maybe it works for you to make a dual panel approach. Then use one panel (which can be multiplex, or plastic) with holes for all the D-Sub connectors and use a PCB for all the electronics, and then connect them to each other with hinges.

If you connect the wires that then still go to the PCB with IDC connectors and flatcables, you have plenty of room on the PCB for the electronics.


Have you considered a 4layer PCB just to increase your degree’s of freedom?

Even crazier… if the through hole Dtypes have long enough pins have you thought of physically stacking 2 2layer (some insulation between) to create a cheap 4layer. Im only suggesting this as I am guessing these are low-frequency signals otherwise you would not be going for a non-gnd plane design or have the traces so close

This job needs a 4 layer board. One solid ground plane and a layer dealing with all the power and high current traces

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Interesting Idé. Like with spacers or something?

I have lots of high power circuits for example alot of Uln2003 chips.

I want to have the dimensions of the tracks to the maximum what every output can handle I think it is 500mA

And maximum on ground is 2.5 A

I will likely draw only 120mA per output.

Then Whe have the “bus”. 2, 28V busses.

120mA * 54= 6480mA 6.5A worst case scenario.

On what layer would you put the 28, 15, 12 and 5 Volt bus?

I have not placed all parts jet. I am thinking of starting from the beginning.

But relays should be close to Phoenix 2 and 3 pole conectors and corresponding ULN2003A chips, I am thinking. Also outputs should be close to lower eadg. Of pcb.

I guess this have to be a 1 year project.

Great respect for those making pcbs!

How would you conect 2 pcbs on top of each other?

D-sub, pin out?

Is there better alternative?

I think what Naib meant is to use a thin layer of isolation (such as kapton tape) between the PCB’s, and then directly stack them on top of each other.

However, I think a bunch of 0.1" male & female headers to use as interconnects is more versatile.

The ratsnest is a usable tool for minimising PCB track length.
I usually do it in 2 steps. First roughly order the footprints in groups that belong to each other next to the PCB, and then start putting footprints on the PCB according to ratsnest connections.

Exactly, I was going to suggest a bunch of pin headers but other constraints (ie thickness) is unknown.

so

  1. 4 layer PCB
  2. crude 4layer made out of 2 layer. Using long pin D-type solder the 1st flush with Dtype, add some insulation (or a thin spacer) and solder the 2nd directly over
  3. 0.1" headers

Basically, you need more tracking layers