I hereby certify that I am not simply asking someone else to design a footprint for me.
This is an auto-generated message that is in place on the “footprints” section of the KiCad.info forum. If I remove it and ask for a footprint to be designed anyway, I understand that I will be subject to forum members telling me to go design my own footprint or referring me to a 3rd party footprint site.
Hello everyone.
I’ve designed few boards with Unictron antennae, they all work as expected. But now that I have a little of free time, I want to deeper learn KiCAD to better organize my projects.
Using this kind of chip antennae (where one of the pads are connected to GND on purpose) returns a handful of DRC errors. I can live with that as I’ve done so far, but I’d like a way to fix it, because on bigger projects, some real error can hide between them.
Here I bring as example the AA088 (an GNSS antenna).
You have not given us enough information to see what is going on here. At the very least, we need the exact DRC messages, but that is still not enough, because we can’t see which is what from those messages alone.
The best and easiest way is if you make a small example project with your footprint and (including a simple schematic with the antenna and something to connect it to). and then zip up the whole project and post it here. This makes it easy to both look into the project to see what is going on, and to experiment a bit to see what is the best solution for you.
As a partial / temporary solution, you can right click on any message in the DRC window, and then exclude the violation. This way you can hide the violations that you know are not important, so the important ones do not get hidden among all the unimportant DRC violations.
I am no expert in HF stuff, and I know sometimes things are seemingly shorted to GND but the “short” in your antenna does look extremely short. But apparently it is the same as in the datasheet so I’ll stop complaining about that.
Your DRC violations are between some pad and a rectangle. Normally you should not use graphic entities such as rectangles for conductive copper. In this case however, you have to connect the two pads. For such cases graphic entities on a copper layer are indeed used. For an example you can have a look at one of the “net tie” footprints.
In your case:
Load the antenna in the footprint editor.
Footprint Editor / File / Footprint Properties / Clearance Overrides and Settings (tab page) / Net Ties / Pad groups allowed to short different nets and then click on the plus and add the string 1S, 1G in the box.
Unfortunately this still leaves the problem with the aperture pad. You can’t add the aperture pad to the list of pad numbers that are “allowed to short different nets”, because the aperture pad does not have a pad number. This is an unusual case and it’s quite likely nobody ever tried this before. I tried to replace the aperture pad with some graphic rectangles, but that does also not work. A method that does work is to move the 1G pad into the GND plane. This way the graphic rectangle (or replace it with a polygon) covers the whole pad, the aperture pad is for the place where you want solder paste, and the 1G pad does not touch the aperture pad. It’s untested, but probably works.
You also have DRC violations for Error: Board edge clearance violation (board setup constraints edge clearance 0,3mm; actual 0,1mm) And that should be pretty clear. You antenna is too close to the edge of the PCB. You can reduce this clearance in the board setup, but 0.3mm is already pretty small. moving the antenna a bit inward is probably a better solution.
My KiCad version is newer then yours, so if I save my modifications, you can’t open it, so that is not of much use. It’s also bedtime now for me. Maybe someone else has a better idea.
Ignore “Footprint not found in libraries” (I don’t have your libraries.
Moved the PCB outline 0.2mm to the right t ocreate more clearance for the antenna.
Turned the GND zone into a big pentagon.
Fiddled a bit with GND tracks because I modified the footprint (This is not OK yet).
Changes I made to both antenna footprints:
Added the shorted pad numbers s to the net tie box.
Moved the 1G pad away, so it is far enough away from the aperture pad so DRC does not complain about overlapping pads.
Replaced the rectangle on copper by a (filled) polygon (just because I needed more corners) Changed line thickness to 0.2mm so it center points fit on the 100um grid. (this influences corner rounding, you may want to change it).
Made the polygon overlap the pads, I always dislike “just touching” when you want to be 100% sure there is no gap in between items.
Used Pad Edit Mode [Ctrl + E] to make the polygon a part of the pad itself.
In Pad Edit Mode [Ctrl + E] also Placed a rectangle on F.Cu and changed it into a Number Box in the properties manager. This confines the area in which KiCad shows the pad number and net name. It’s mostly cosmetic, but a nice touch.
DRC complains when either the aperture pad overlaps both pad, or when it overlaps with the graphic item that connects the two pads. But apparently KiCad is happy when the actual pads of a “net tie” are overlapping. So by keeping the aperture pad completely on one of the pads, DRC is happy (or ignorant) about this too.
A few remaining details:
Exact location / size of the 1G pads. A bit of a problem here is that connected tracks have rounded ends, and if the arc of a track overlaps with the 1S pad you get DRC violations. Connecting directly with a zone works, but KiCad does create a clearance from the other (overlapping) pad. I also ignored via locations in this test project.
You can draw the Keepout zone / Rule area inside the footprint itself. Whether you want that is a personal choice.
Used: PCB Editor / File / Export / Footprints to New Library.
Used: PCB Editor / Tools / Update Schematic from PCB to push the library change back to the schematic. If you can not open this KiCad V8 project, then maybe you can re-use / open / examine the footprints in KiCad V7.
Duplicated the whole circuit and added the “old” with the original footprints, because I’m thinking of creating a feature request for this on gitlab for better handling of those aperture pads in this “net tie”.
You see, the DRC Error: Board edge clearance violation (board setup constraints edge clearance 0,3mm; actual 0,1mm) proved my point as I did this sketch quickly and this error went by, among all the other related to the antennae’s pads.
I downloaded KiCAD8 to understand what you did, and I could pretty much understand it all. I was able to reproduce the changes on the footprint on a different branch of my project, but I keep getting one error:
I did as you did and compared my project to yours, but the Error: Items shorting two nets (nets GND and Net-(AE2-IN_SIG)) persists. I tried moving the polygons but had no success with the AA066.
I could just ignore this error, but this layout may become a problem for HF: those sharp angles might be an issue for the antenna’s efficiency.
A workaround to avoid the sharp angles could be this:
And because the pad is such a narrow slit, the rounded end of tracks connecting to it overlap with things they should not overlap with, and this causes the DRC violation. I did not fix it but only mentioned it in the text because I did not know how you want to fill in the details of connecting this to the GND plane. You have to change the geometry of that pad a bit and in combination with the other pad to completely resolve the issue.
