Advanced constraints syntax for KiCad and OpenROAD

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Hi everybody. I’m part of an academic team that is exploring what it will take to add support for advanced constraints to KiCad. The KiCad roadmap for Version 6 (https://docs.kicad.org/doxygen/v6_road_map.html#v6_pcb_constraint) indicates future support for advanced constraints, and we would like to contribute if we can. We are working on a specification for KiCad (s-expression) compatible constraints and topology for high-speed designs. We would appreciate your feedback!

Our project is called OpenROAD and it mostly focuses on IC design, but I’m working on the PCB section. You can check out the OpenROAD project here (https://theopenroadproject.org/). The overall goal is to have a “no-human-in-the-loop” placer and router for PCB. The project is DARPA sponsored and a requirement is that the whole thing be totally open-source. Since KiCad is the best (only?) fully open-source PCB design tool in general use we are basing everything on KiCad and making our tools KiCad compatible.

We are working on a (for now) standalone placer, router, DRC checker (for advanced constraints), and a decompactor. The idea is to be able to autoplace and autoroute a BeagleBone Black type design within six months. This means 6+ layers, BGA microprocessor, DDR3L memory, USB, HDMI, eMMC, and so on.

The tool is written in C++ with a Python API and is available to play with here (https://github.com/The-OpenROAD-Project/PCB-PR-App). Don’t expect perfect results. Maybe don’t even expect so-so results yet :slight_smile: We are still adding features and tuning the layout algorithms, but we have a pretty good framework to build on. The placer and low-speed part of the autorouter is working for several simple test cases. The advanced features are in-progress and will be in some form of beta by July 2020.

To get the advanced features working we need to supplement the KiCad format with some constraints like length matching and microstrip routing. An evolving specification for advanced constraints is here (https://docs.google.com/document/d/e/2PACX-1vTkRAP8958dubgnsq6Rndtgp_iXvjcJoBpWdVlxYD18WWxCoFPRtS3IKPc7mBKmphw63JZtnGQHzuKf/pub). We are looking for feedback on the feature list and syntax. We expect significant changes will be needed before we have a “working” version that we can start using for layout.

If you are interested in the project you can help us by reviewing the feature list and syntax (the constraints document); trying the tool out and submitting issues; and by contributing test cases.
We could also use pointers to any similar efforts towards advanced constraints in KiCad. We haven’t found them, but I’m guessing that is because we aren’t good at searching this forum, not because they don’t exist.

Thanks everyone! We wouldn’t have been able to make such quick progress without KiCad!

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I appreciate the outreach.

Most of the active members and lurkers on this forum are KiCad users with EE background
It would probably be smart if you re-posted this on the KiCad developers mailing list. They will probably be more competent to comment.

I’d also look into what Jitx and Circuit mind are into. There might be some overlap.

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Thanks for the pointers!

I hadn’t heard about Circuit Mind but we are actively working with JitX on this project.

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See also Crowdfund Clearance Matrix (Contracting KiPro to implement it).

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Thanks for the pointer.

I did see that post about the clearance matrix. We are planning to implement it eventually. But discussions with experts (Mentor Graphics, Cadence, etc.) seem to indicate that a clearance matrix is not strictly need for many designs.

Examples of designs that would require a clearance matrix would help me convince my bosses that we should work on it.

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Basically any design with galvanic isolation and/or high voltage clearance requirements.

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Hi @devon-

A few months ago, I tried to reach Andrew Kahng to see if he would suggest someone to present on OpenRoad at FOSDEM this year. Almost all of the KiCad developers will be there during this time and it would be an excellent opportunity to talk about this project and how to integrate some or all of the required elements you are considering.

If you or someone on your team will be there, we should set aside some time to meet up.

Otherwise, if you are interested in your changes aligning with the KiCad roadmap, we can discuss how to do this over at the developer mailing list.

-Seth

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A clearance matrix is needed for:

  • Power Layout (e.g. HV Power Supplies, Inverters)
  • Medicial Equipement (Isolation)
  • Test Equipement

In particular, if you have same voltage nets at high potential, clearance matrix is a challenge. I would appreciate if it could be integrated in kicad itself.

I would talk with the key developers if they would appreciate some assistance.

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