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TLV9362.zip (166.6 KB)
Here is the model.
========== COPY BETWEEN LINES ==========
* DUAL OPERATIONAL AMPLIFIER
* (TLV9361 X 2 OPERATIONAL AMPLIFIERS)
*
* SPICE (Simulation Program with Integrated Circuit Emphasis)
* SUBCIRCUIT
*
.SUBCKT TLV9362 1 2 3 4 5 6 7 8
XA 3 2 8 4 1 TLV9361
XB 5 6 8 4 7 TLV9361
.ENDS
*
*
* Connections:
* NON-INVERTING INPUT
* | INVERTING INPUT
* | | POSITIVE POWER SUPPLY
* | | | NEGATIVE POWER SUPPLY
* | | | | OUTPUT
* | | | | |
.SUBCKT TLV9361 IN+ IN- VCC VEE OUT
*
* MODEL DEFINITIONS:
.MODEL BB_SW VSWITCH(RON=50 ROFF=1E12 VON=700E-3 VOFF=0)
.MODEL ESD_SW VSWITCH(RON=50 ROFF=1E12 VON=250E-3 VOFF=0)
.MODEL OL_SW VSWITCH(RON=1E-3 ROFF=1E9 VON=900E-3 VOFF=800E-3)
.MODEL OR_SW VSWITCH(RON=10E-3 ROFF=1E9 VON=1E-3 VOFF=0)
.MODEL R_NOISELESS RES(T_ABS=-273.15)
*
V_OS 25 26 400U
V_GRP 53 MID 50
V_GRN 54 MID -35
I_OS ESDN MID 0
I_B 26 MID 10P
V_ISCP 68 MID 65
V_ISCN 69 MID -65
V_ORN 67 VCLP -4.25
V11 73 66 0
V_ORP 65 VCLP 4.25
V12 72 64 0
V4 40 OUT 0
VCM_MIN 89 VEE_B 0
VCM_MAX 90 VCC_B -2
I_Q VCC VEE 2.6M
XIN11 ESDN MID FEMT_0
XI_N MID 26 FEMT_0
XE_N ESDP 26 VNSE_0
C3 27 MID 5F IC=0
R74 MID 27 R_RES_1 1MEG
GVCCS5 27 MID VSENSE MID -1U
C2 CLAMP MID 184.6N IC=0
R61 MID CLAMP R_RES_2 1MEG
XVCCS_LIM_2 28 MID MID CLAMP VCCS_LIM_2_0
R60 MID 28 R_RES_3 1MEG
XVCCS_LIM_1 29 30 MID 28 VCCS_LIM_1_0
C23 31 MID 8P IC=0
R73 31 32 R_RES_4 10K
R72 32 33 R_RES_5 352K
C22 34 MID 75.07F IC=0
R71 34 35 R_RES_6 10K
R70 35 36 R_RES_7 18.38K
XVCCS_LIM_ZO 34 MID MID 37 VCCS_LIM_ZO_0
R69 36 MID R_RES_8 1
C21 38 39 90N IC=0
R68 39 MID R_RES_9 463.4
R67 39 38 R_RES_10 10K
G_ADJUST2 36 MID 32 MID 1
R64 33 MID R_RES_11 1
G_ADJUST1 33 MID 39 MID 22.58
R11 38 MID R_RES_12 1
R7 37 MID 1
RDUMMY MID 40 R_RES_13 1.01K
RX 40 37 R_RES_14 10.1K
G_AOL_ZO 38 MID CL_CLAMP 40 -368.16
R63 MID 41 R_RES_15 111.1
C6 41 42 159.2P
R24 42 41 R_RES_16 100MEG
G_ADJUST 42 MID VEE_B MID -802.1M
R23 MID 42 R_RES_17 1
R22 MID 43 R_RES_18 1
GVCCS4 43 MID 44 MID -400
R20 MID 44 R_RES_19 2.506K
C5 44 45 3.183P
R19 45 44 R_RES_20 1MEG
R18 MID 45 R_RES_21 1
GVCCS3 45 MID 46 MID -1
R17 MID 46 R_RES_22 900.8
C4 46 47 176.8P
R16 47 46 R_RES_23 1MEG
GVCCS2 47 MID VCC_B MID -1.761M
R8 MID 47 R_RES_24 1
R15 MID 48 R_RES_25 1
G_2 48 MID 49 MID -6
R2B MID 49 R_RES_26 200K
C1B 49 50 159F
R1B 50 49 R_RES_27 1MEG
R14 MID 50 R_RES_28 1
GVCCS1 50 MID 51 MID -1
R6 MID 51 R_RES_29 200
C1 51 52 159.2P
R5 52 51 R_RES_30 1MEG
G_1 52 MID ESDP MID -7.924M
RSRC MID 52 R_RES_31 1
R13 INN_ESDP INN_ESDN R_RES_32 50
R12 INP_ESDN INP_ESDP R_RES_33 50
XGR_AMP 53 54 55 MID 56 57 CLAMP_AMP_HI_0
R49 53 MID R_RES_34 1G
R54 54 MID R_RES_35 1G
R55 VSENSE 55 R_RES_36 1M
C16 55 MID 1F
R50 56 MID R_RES_37 1
R53 MID 57 R_RES_38 1
R51 56 58 R_RES_39 1M
R52 57 59 R_RES_40 1M
C14 58 MID 1F
C15 MID 59 1F
XGR_SRC 58 59 CLAMP MID VCCS_LIM_GR_0
S5 VEE INP_ESDN VEE INP_ESDN S_VSWITCH_1
S4 VEE INN_ESDN VEE INN_ESDN S_VSWITCH_2
S2 INN_ESDP VCC INN_ESDP VCC S_VSWITCH_3
S3 INP_ESDP VCC INP_ESDP VCC S_VSWITCH_4
C18 60 MID 1P
R57 61 60 R_RES_41 100
C17 62 MID 1P
R56 63 62 R_RES_42 100
R48 MID 64 R_RES_43 1
G11 64 MID 65 MID -1
R47 66 MID R_RES_44 1
G10 66 MID 67 MID -1
XIQP VIMON MID MID VCC VCCS_LIMIT_IQ_0
XIQN MID VIMON VEE MID VCCS_LIMIT_IQ_0
C_DIFF ESDP ESDN 9P
XCL_AMP 68 69 VIMON MID 70 71 CLAMP_AMP_LO_0
SOR_SWP CLAMP 72 CLAMP 72 S_VSWITCH_5
SOR_SWN 73 CLAMP 73 CLAMP S_VSWITCH_6
R42 70 MID R_RES_45 1
R45 MID 71 R_RES_46 1
R43 70 74 R_RES_47 1M
R44 71 75 R_RES_48 1M
C12 74 MID 1F
C13 MID 75 1F
XCL_SRC 74 75 CL_CLAMP MID VCCS_LIM_4_0
R41 68 MID R_RES_49 1G
R46 MID 69 R_RES_50 1G
XCLAWP VIMON MID 76 VCC_B VCCS_LIM_CLAW+_0
XCLAWN MID VIMON VEE_B 77 VCCS_LIM_CLAW-_0
R29 76 VCC_B R_RES_51 1K
R30 76 78 R_RES_52 1M
R32 VEE_B 77 R_RES_53 1K
R33 79 77 R_RES_54 1M
C9 79 MID 1F
C8 MID 78 1F
G8 VCC_CLP MID 78 MID -1M
R31 VCC_CLP MID R_RES_55 1K
G9 VEE_CLP MID 79 MID -1M
R34 MID VEE_CLP R_RES_56 1K
XCLAW_AMP VCC_CLP VEE_CLP VOUT_S MID 80 81 CLAMP_AMP_LO_0
R35 VCC_CLP MID R_RES_57 1G
R40 VEE_CLP MID R_RES_58 1G
R36 80 MID R_RES_59 1
R39 MID 81 R_RES_60 1
R37 80 82 R_RES_61 1M
R38 81 83 R_RES_62 1M
C10 82 MID 1F
C11 MID 83 1F
XCLAW_SRC 82 83 CLAW_CLAMP MID VCCS_LIM_3_0
H2 63 MID V11 -1
H3 61 MID V12 1
C19 SW_OL MID 1P
R59 84 SW_OL R_RES_63 100
R58 84 MID R_RES_64 1
XOL_SENSE MID 84 62 60 OL_SENSE_0
S1 38 39 SW_OL MID S_VSWITCH_7
H3_2 85 MID V4 1K
S7 VEE OUT VEE OUT S_VSWITCH_8
S6 OUT VCC OUT VCC S_VSWITCH_9
R83 MID 86 R_RES_65 1G
R_VOUT_S 86 VOUT_S R_RES_66 100
C_VOUT_S VOUT_S MID 1N
E3 86 MID OUT MID 1
C_VIMON VIMON MID 1N
R_VIMON 85 VIMON R_RES_67 100
R81 MID 85 R_RES_68 1G
R_VCLP 87 VCLP R_RES_69 100
C_VCLP VCLP MID 100P
E2 87 MID CL_CLAMP MID 1
R66 MID CL_CLAMP R_RES_70 1K
G16 CL_CLAMP MID CLAW_CLAMP MID -1M
R65 MID CLAW_CLAMP R_RES_71 1K
G15 CLAW_CLAMP MID 27 MID -1M
R62 MID VSENSE R_RES_72 1K
G12 VSENSE MID CLAMP MID -1M
C7 29 MID 1F
R28 29 88 R_RES_73 1M
R25 MID 89 R_RES_74 1G
R26 90 MID R_RES_75 1G
R27 MID 88 R_RES_76 1
XVCM_CLAMP 91 MID 88 MID 90 89 VCCS_EXT_LIM_0
E6 MID 0 92 0 1
R109 VEE_B 0 R_RES_77 1
R113 93 VEE_B R_RES_78 1M
C35 93 0 1F
R112 92 93 R_RES_79 1MEG
C34 92 0 100N
R108 92 0 R_RES_80 1T
R111 94 92 R_RES_81 1MEG
C33 94 0 1F
R110 VCC_B 94 R_RES_82 1M
R107 VCC_B 0 R_RES_83 1
G37 VEE_B 0 VEE 0 -1
G36 VCC_B 0 VCC 0 -1
R21 95 91 R_RES_84 1K
G6 91 95 43 41 -1M
R10 30 ESDN R_RES_85 1M
R9 95 96 R_RES_86 1M
R_CMR 25 96 R_RES_87 1K
G_CMR 96 25 48 MID -1M
C_CMN ESDN MID 1P
C_CMP MID ESDP 1P
R4 ESDN MID R_RES_88 1T
R3 MID ESDP R_RES_89 1T
R2 IN- ESDN R_RES_90 10M
R1 IN+ ESDP R_RES_91 10M
.MODEL R_RES_1 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_2 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_3 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_4 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_5 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_6 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_7 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_8 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_9 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_10 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_11 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_12 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_13 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_14 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_15 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_16 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_17 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_18 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_19 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_20 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_21 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_22 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_23 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_24 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_25 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_26 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_27 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_28 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_29 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_30 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_31 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_32 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_33 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_34 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_35 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_36 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_37 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_38 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_39 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_40 RES ( TCE=0 T_ABS=-273.15)
.MODEL S_VSWITCH_1 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=450M)
.MODEL S_VSWITCH_2 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=450M)
.MODEL S_VSWITCH_3 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=450M)
.MODEL S_VSWITCH_4 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=450M)
.MODEL R_RES_41 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_42 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_43 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_44 RES ( TCE=0 T_ABS=-273.15)
.MODEL S_VSWITCH_5 VSWITCH (RON=10M ROFF=1G VON=10M VOFF=0)
.MODEL S_VSWITCH_6 VSWITCH (RON=10M ROFF=1G VON=10M VOFF=0)
.MODEL R_RES_45 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_46 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_47 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_48 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_49 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_50 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_51 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_52 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_53 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_54 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_55 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_56 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_57 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_58 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_59 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_60 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_61 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_62 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_63 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_64 RES ( TCE=0 T_ABS=-273.15)
.MODEL S_VSWITCH_7 VSWITCH (RON=1M ROFF=1G VON=900M VOFF=800M)
.MODEL S_VSWITCH_8 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=450M)
.MODEL S_VSWITCH_9 VSWITCH (RON=50 ROFF=1T VON=500M VOFF=450M)
.MODEL R_RES_65 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_66 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_67 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_68 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_69 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_70 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_71 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_72 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_73 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_74 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_75 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_76 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_77 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_78 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_79 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_80 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_81 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_82 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_83 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_84 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_85 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_86 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_87 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_88 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_89 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_90 RES ( TCE=0 T_ABS=-273.15)
.MODEL R_RES_91 RES ( TCE=0 T_ABS=-273.15)
.ENDS TLV9362
* FEMT - INPUT CURRENT NOISE IN FA/RT-HZ
.SUBCKT FEMT_0 1 2
* INPUT VARIABLES
* SET UP 1/F NOISE
* FLWF = 1/F FREQUENCY IN HZ
.PARAM FLWF=1E-3
* NLFF = CURRENT NOISE DENSITY AT 1/F FREQUENCY IN FA/RT(HZ)
.PARAM NLFF=100
* SET UP BROADBAND NOISE
* NVRF = BROADBAND CURRENT NOISE DENSITY IN FA/RT(HZ)
.PARAM NVRF=100
* CALCULATED VALUES
.PARAM GLFF={PWR(FLWF,0.25)*NLFF/1164}
.PARAM RNVF={1.184*PWR(NVRF,2)}
.MODEL DVNF D KF={PWR(FLWF,0.5)/1E11} IS=1.0E-16
* CIRCUIT CONNECTIONS
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVNF
D2 8 0 DVNF
E1 3 6 7 8 {GLFF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNVF}
R5 5 0 {RNVF}
R6 3 4 1E9
R7 4 0 1E9
G1 1 2 3 4 1E-6
.ENDS
* VNSE - INPUT VOLTAGE NOISE IN NV/RT-HZ
.SUBCKT VNSE_0 1 2
* INPUT VARIABLES
* SET UP 1/F NOISE
* FLW = 1/F FREQUENCY IN HZ
.PARAM FLW=10
* NLF = VOLTAGE NOISE DENSITY AT 1/F FREQUENCY IN NV/RT(HZ)
.PARAM NLF=64.13
* SET UP BROADBAND NOISE
* NVR = BROADBAND VOLTAGE NOISE DENSITY IN NV/RT(HZ)
.PARAM NVR=4
* CALCULATED VALUES
.PARAM GLF={PWR(FLW,0.25)*NLF/1164}
.PARAM RNV={1.184*PWR(NVR,2)}
.MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16
* CIRCUIT CONNECTIONS
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVN
D2 8 0 DVN
E1 3 6 7 8 {GLF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNV}
R5 5 0 {RNV}
R6 3 4 1E9
R7 4 0 1E9
E3 1 2 3 4 1
.ENDS
* VOLTAGE-CONTROLLED CURRENT SOURCE WITH LIMITS - AOL SECOND STAGE
.SUBCKT VCCS_LIM_2_0 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1.26E-1
.PARAM IPOS = 4.615
.PARAM INEG = -4.615
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
* VOLTAGE-CONTROLLED CURRENT SOURCE WITH LIMITS - AOL FIRST STAGE
.SUBCKT VCCS_LIM_1_0 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-4
.PARAM IPOS = .5
.PARAM INEG = -.5
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
* VOLTAGE-CONTROLLED CURRENT SOURCE WITH LIMITS - ZO OUTPUT
.SUBCKT VCCS_LIM_ZO_0 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 2E3
.PARAM INEG = -2E3
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
* CLAMP AMP - OVERLOAD AND GROSS CLAMP
.SUBCKT CLAMP_AMP_HI_0 VC+ VC- VIN COM VO+ VO-
* PINS CLAMP V+ CLAMP V- VIN COM VOUT+ VOUT-
.PARAM G=10
* OUTPUT G(COM,0) WHEN CONDITION NOT MET
GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVO- COM VO- VALUE = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ENDS
* VOLTAGE-CONTROLLED CURRENT SOURCE WITH LIMITS - GROSS CLAMP
.SUBCKT VCCS_LIM_GR_0 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 14
.PARAM INEG = -12
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
* VOLTAGE-CONTROLLED SOURCE WITH LIMITS - IOUT DRAW
.SUBCKT VCCS_LIMIT_IQ_0 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-3
G1 IOUT- IOUT+ VALUE={IF( (V(VC+,VC-)<=0),0,GAIN*V(VC+,VC-) )}
.ENDS
* CLAMP AMP - CLAW AND CURRENT LIMIT CLAMP
.SUBCKT CLAMP_AMP_LO_0 VC+ VC- VIN COM VO+ VO-
* PINS CLAMP V+ CLAMP V- VIN COM VOUT+ VOUT-
.PARAM G=1
* OUTPUT G(COM,0) WHEN CONDITION NOT MET
GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVO- COM VO- VALUE = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ENDS
* VOLTAGE-CONTROLLED CURRENT SOURCE WITH LIMITS - CURRENT LIMIT CLAMP
.SUBCKT VCCS_LIM_4_0 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 200E-3
.PARAM INEG = -200E-3
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
* VOLTAGE-CONTROLLED CURRENT SOURCE (TABLE-DEFINED) - CLAW+
.SUBCKT VCCS_LIM_CLAW+_0 VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {(V(VC+,VC-))} =
+(0, 6.87E-5)
+(15, 4.04E-4)
+(30, 7.93E-4)
+(45, 1.27E-3)
+(60, 1.8E-3)
+(70, 2.4E-3)
+(80, 3.75E-3)
+(90, 9.83E-3)
.ENDS
* VOLTAGE-CONTROLLED CURRENT SOURCE (TABLE-DEFINED) - CLAW-
.SUBCKT VCCS_LIM_CLAW-_0 VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {(V(VC+,VC-))} =
+(0, 7.59E-5)
+(40, 1.21E-3)
+(60, 2E-3)
+(70, 2.61E-3)
+(80, 4.42E-3)
+(90, 9.61E-3)
.ENDS
* VOLTAGE-CONTROLLED CURRENT SOURCE WITH LIMITS - CLAW CLAMP
.SUBCKT VCCS_LIM_3_0 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 100E-3
.PARAM INEG = -70E-3
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
* OVERLOAD SENSE FOR ZO SWITCHES
.SUBCKT OL_SENSE_0 COM SW+ OLN OLP
* PINS COM SW+ OLN OLP
GSW+ COM SW+ VALUE = {IF((V(OLN,COM)>10E-3 | V(OLP,COM)>10E-3),1,0)}
.ENDS
* VOLTAGE-CONTROLLED CURRENT SOURCE WITH EXTERNAL LIMITS - VCM CLAMP
.SUBCKT VCCS_EXT_LIM_0 VIN+ VIN- IOUT- IOUT+ VP+ VP-
.PARAM GAIN = 1
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))}
.ENDS
.END
========== END COPY ==========