Hi folks,
I’m trying to simulate this circuit of an AD620. I used this model file and reassigned the node sequence to match the symbol (so it’s 3 2 7 4 6 5 1 8). The simulation runs file but I keep getting this error when I add the ‘OUT’ signal: “Error: vector V(/OUT) not found!”
Thoughts?
schematic: https://www.dropbox.com/s/qychhllt4935wz8/Lab4%20-%20bridge.sch?dl=0
Thanks in advance,
-May
here is the link to the mod file. It wouldn’t let me put two links in one post.
mod file: https://www.dropbox.com/s/pjkywjvyv18t97b/ad620.mod?dl=0
I can’t see anything because none of your dropbox links are public. But if I had to take a blind guess…you might have to add a 1g resistor to ground on the OUT node because the netlist generator is detecting it as a NC and trimming it out.
I’m sorry about the dropbox links not working. Your blind guess was spot on though 
Thank you!
Could you please elaborate on the explanation though. I simulated other op-amps (e.g.LM741) before and have left the output pin floating, and was able to see output signal in the simulator. Why is this IC (AD620) any different? I mean why does the AD620 need the 1g load resistor?
Thanks!
I’m not sure. I would probably need to take an in-depth look at both exact SCHs to try and see what’s going on there.
However, I’d be more concerned about why you’re using linear opamps and inamps without any feedback resistor. If you need a comparator, you should use a real comparator which has been designed to switch in and out of saturation.
