A few questions about Custom Rules syntax

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1

I have a few questions about Custom Rules sytax. I’ve read everything in this thread when the rule syntax was still in the development and I’ve read the documentation but there are still a few things I’d like to ask.

1:
I’ve found these custom rules when searching for .kicad_dru file for using with JLCPCB where I saw this rule:

# silkscreen
(rule "Minimum line width"
	(constraint track_width (min 6mil))
	(layer "F.Silkscreen") (layer "B.Silkscreen"))

The intention was to check for the silkscreen line thickness but there are 2 reasons why this rule can’t work:

  • track_width constraint type can not be used to check the line thickness and thickness constraint type doesn’t exit
  • layer can not be specified more than once in the same rule (only the last layer specified is in effect)

Or is there a way to specfy layer more than once without wildards?

This is how I tested if layer can be specified more than once. I created the rule:

(rule "Test"
	(constraint track_width (min 100 mil))
	(layer "F.Cu")
	(layer "B.Cu"))

and the result was only errors on B.Cu layer were reported by DRC.

When I used a wildcard:

(rule "Test"
	(constraint track_width (min 100 mil))
	(layer "?.Cu"))

then the rule worked as expected.

I tried:

(rule "Test"
	(constraint track_width (min 100 mil))
	(layer "F.Cu") || (layer "B.Cu"))

and

(rule "Test"
	(constraint track_width (min 100 mil))
	(layer "F.Cu" || "B.Cu"))

but both was a syntax error.

2:
There are separate parameters for Min. Via hole size, Min. Via diameter and PTH hole Size at JLCPCB.

Is there a difference between Via hole and PTH hole?

The rules for these in the document I linked are:

(rule "Minimum Via Hole Size"
	(constraint hole (min 0.2mm))
	(condition "A.Type == 'via'"))

(rule "Minimum Via Diameter"
	(constraint length (min 0.4mm))
	(condition "A.Type == 'via'"))

(rule "PTH Hole Size"
	(constraint hole (min 0.2mm) (max 6.35mm))
	(condition "A.isPlated()"))

(rule "PTH Size"
	(constraint length (min 0.7mm) (max 6.35mm))
	(condition "A.isPlated()"))

but that doesn’t seem right. The constraint for Minimum Via Diameter should probably be via_diameter instead of length.

And wouldn’t the condition (condition "A.isPlated()") be true for VIA too - resulting in conditions (condition "A.Type == 'via'")) to never be triggered?

BTW, I am not sure from where is number 0.7 mm in PTH Size rule - maybe author calculated it as 0.2*PI and rounded it to 0.7 to calculate the length of the annular ring by using a diameter?

3:
Is there a way to check the silkscreen miminum line width using custom rules?

I could write:

(rule "Minimum silkscreen line width"
	(condition "A.Type == 'Graphic' && A.Thickness < 5 mil"))

but then there should be some constraint which would always trigger the violation in case the condition is true.

4.
Are there any examples of using AB. object in custom rules? That would be useful.

Of course, it would be nice if someone could posto or link to a complete and correct custom rules for 2 layer PCB production with JLCPCB.

2

Your conclusions regarding layer are correct. It can only be specified once, but wildcards are allowed.

(You are also correct that the silkscreen line width test won’t work even with a wildcard because track-width only checks tracks, not graphic objects.)

The length constraint is for checking the total length of the tracks on a particular net. It has nothing to do with vias.

And yes, a via hole will always be a plated hole, but a plated hole will not always be a via hole.

Their 0.7mm minimum PTH size is probably a result of their smallest drills (or at least the smallest size that doesn’t break all the time and therefore incur additional costs).

To check that an expression must be true, use an assertion. Try something like:

(rule "Minimum silkscreen line width"
    (constraint assertion)
    (condition "A.Type != 'Graphic' || A.Thickness >= 5 mil"))

The AB tag currently only has use when used with .isCoupledDiffPair(). It’s possible we’d add functions in the future that were a function of both A and B, but that’s it right now.

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3

I could’t find any parameter on JLCPCB’s site to be 0.7 mm, that’s why I assumed the author of that rule maybe thought length is the length of the ring and he maybe calculated the value as length = 2*r*PI using 0.2 mm instead 2*r

So the assertion constraint would raise a violation if the condition is true and the assert expression is false?

I am looking at the assertion example you posted here and according to that wouldn’t the rule be:

(rule "Minimum silkscreen line width"
    (constraint assertion "A.Thickness >= 5 mil")
    (condition "A.Type == 'Graphic'"))

?

I tried using assertion but the error was Unrecognized item 'assertion'. I am using KiCad 6.0.11, seems that was added in the development build?

Thank you very much for your reply! It’s nice to get an answer from the author of the Custom Rules itself :slight_smile:

BTW, I was considering to start using KiCad a few years ago but it seemed to me it wouldn’t be easy to get used to assigning the footprints after choosing the symbols, exporting and importing the netlists to start designing the board and a few other things but now that I saw everything added to the program since then - from now on I’ll be using only KiCad :slight_smile:

I really like how everything could be set up by using Custom Rules and I think that way is far better than any menu based system in use.

4

I think the term “assertion” comes from programming languages. It means that the asserted claim is expected to be true; otherwise there’s an error.

I don’t have KiCad at hand now so I can check the syntax only later…

5

Oh, yes assertion was added in 7.0 (which should be released next week).

You could be right on the syntax; I’ve been buried in the simulator for months now so the DRC stuff is no longer fresh in my brain…

2 Likes
6

Yes, I’ve been using assert for years with embedded devices (which for some reason is not widely used) and not only during the development stage but leaving the asserts even when the device is finished. Here is how that could look like in case someone is interested:

my_dbg.h

#ifndef my_dbg_header
#define my_dbg_header

#include <stdlib.h>

#include "lcd.h"
#include "pisanje.h"

#define DEBUG	0	// za #if DEBUG

//#define NDEBUG	// za assert()

#define		__ASSERT_USE_STDERR		// da bi se pozvalo __assert()
#include <assert.h>

// koristenje assert-a
extern void __assert(const char *__func, const char *__file, int __lineno, const char *__sexp);

#endif

my_dbg.c

#include "my_dbg.h"

void __assert(const char *__func, const char *__file, int __lineno, const char *__sexp) {
	lcd_clrscr();
	lcd_puts(__func);
	lcd_gotoxy(0,1);
	lcd_puts(__file);
	lcd_gotoxy(0,2);
	print_num(__lineno);
	lcd_gotoxy(0,3);
	lcd_puts(__sexp);
	while(1)
		;
}

Then it can be used like this:

some_file.c

#include "my_dbg.h"

uint8_t MENU_prog(uint8_t prog_number) {
	uint8_t prog = 0;
	.
	.
	.
	prog=MENU_get_prog(prog);
	aassert(prog < MAX_PROG + 1);		// reprogramming function is after the last program
	// code to call the program or program edit function
	.
	.
	.
uint8_t MENU_get_prog(uint8_t prog) {
	.
	.
	.
	assert(prog < MAX_PROG);
	.
	.
	.
}

If then after shipping the device there is a violation, user can just take a picture of the screen containing name of the function, name of the file and line number where violation occured which helps with finding the cause of an error.

1 Like
7

I’ve been working on a custom rule to constrain the minimum silkscreen width, I had no luck with some of the sample rules already posted. This seems to do the job, although so far I’m not able to assign the severity of this rule to warning - it is always reported as an error:

(rule "Minimum silkscreen line width"
	(severity warning)
	(constraint assertion "A.Line_Width >= 0.15mm")
	(condition "A.Layer == '?.Silkscreen' && A.Type != 'text'"))
2 Likes
8

Nice find. That’s a bug…

1 Like
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