Line styles for PCBNew graphic objects.
9 Likes
@hermit is there a way to restrict this thread to certain posters? It would be nice to follow up on the idea of preventing this thread from turning into a Q&A for every other feature like happened with the last one.
12 Likes
Individual custom rule severities.
(rule "Via Hole to Track Clearance"
(constraint hole_clearance (min 0.254mm))
(condition "A.Type =='Via' && B.Type =='Track'")
(severity warning))
5 Likes
Assertion constraints in custom rules.
# Disallow solder mask margin overrides
(rule "disallow solder mask margin overrides"
(constraint assertion "A.Soldermask_Margin_Override == 0mm")
(condition "A.Type == 'Pad'"))
5 Likes
Keep netnames on long tracks in the viewport when possible.
You’re going to have to play with this one yourself; I don’t do video. 
3 Likes
This thread has been migrated to a new “KiCad Official SW Thread” category. Only members of the KiCad developers group (and admins) will be able to post in these discussions. If people have questions about something posted in these threads, they should start a new topic and reference the post.
17 Likes