Zone Fill Clearance Issues

[amiller112]

I was finishing off a PCB, and adding in zone fills to each signal layer with a clearance set to 0.5mm and noticed that they were only 0.1mm.
I had a previous PCB using the same zone fill settings and its fine with the 0.5mm clearance around tracks.

The only difference I can see is that my current PCB was started in 9.0.3 and the previous one was started in an earlier version of KiCad 9 (possibly 9.0.1).
When I open the older project in 9.0.3 and refill all zones the clearance remains 0.5mm…

Images:
New:

Old:

Settings for both:

Any ideas?

[RaptorUK]

@amiller112

Any ideas?

Select the Zone, select the track and use the Inspect > Clearance Resolution tool . . .

[amiller112]

I found the issue, it was a custom rule that was overriding the clearance setting.

Rule causing issue:
#LVDS Clearance Between Differential Pairs
(rule “LVDS Clearance Between”
(condition “!AB.isCoupledDiffPair() && A.insideCourtyard(‘*’)”)
(constraint clearance(min 0.1mm)))

Though now I have another issue which is unrelated.