I have recently upgraded from 8.0.4 to 9.0.6, which has been great as a performance issue I was struggling with in 8 has been resolved.
However, I have a high density 6 layer board (in production) which needed a minor revision. I opened said board (created and iterated in v6, 7 & 8) in the PCB Editor in v9, hit B to re-fill zones, and all of a sudden without making any changes to the board at all, some zone clearances to vias changes slightly.
The below image demonstrates the issue in well in a quiet section of the board. This is comparing the generated Gerbers (which for completeness, view the same as the editor, i.e. this is not a graphical issue).
Green is bottom layer copper (not this issue is present on top and bottom layers) for the board in v8, before and after re-fill.
Light blue is the same board opened in v9, it starts off with the copper in the same place as v8, and then on re-fill proceeds to close up the clearance to the vias.
Hi, it could be just a render change. To be sure I think that you should compare the generated gerber. Using a Gerber viewer you should be able to compare a layer from each version to see if there is a real difference. Also it would be worth trying to measure this difference. Because it could be so small that it would have absolutely no impact on a produced board.
Same here. Probably some negligible thing due to some obscure change. KiCad works with integers (on nm resolution) and circles and arcs are inherently irrational numbers. For example, changing PCB Editor / File / Board Setup / Design Rules / Constraints / Arc/circle approximation by segments will have an influence on this, and a change in how numbers are rounded will also result in differences.
