Workflow for LED array

[paulvdh]

A thread I wrote recently has much overlapping info:

Generate ice40 FPGA pin mapping from schematic

Is this a big FPGA, or just some 50 pins as your screenshot suggests? For 50 pins some manual renaming is probably quicker then trying to automate it. If you’re looking for ways to automate for (future) bigger projects there are some ways. First, have a look at the SKiDL Project. SKiDL is a python project that can create a “schematic equivalent” in code and can also generate a KiCad netlist. I see it as a sort of VHDL for schematic design. Another way of automation is to write a Python scrip…

But for this, I would simply draw a few footprints (for example 4) then copy them to make 8 in a row, connect them with wires, and then use block copy operations to double the row to 2, 4, and 8.