Generate ice40 FPGA pin mapping from schematic

Is this a big FPGA, or just some 50 pins as your screenshot suggests?
For 50 pins some manual renaming is probably quicker then trying to automate it.

If you’re looking for ways to automate for (future) bigger projects there are some ways.

First, have a look at the SKiDL Project. SKiDL is a python project that can create a “schematic equivalent” in code and can also generate a KiCad netlist. I see it as a sort of VHDL for schematic design.

Another way of automation is to write a Python script to generate custom schematic symbols for your FPGA, and then also generate a file for your FPGA pin mapping. I do not know much of python, but a few years ago I experimented with it and I wrote a python program that generated a KiCad library for some 40 schematic symbols for connectors in an afternoon. The description of KiCad’s file formats is useful if you want to go this way: https://kicad.org/help/file-formats/

A few years ago I saw a project that can copy text from pin data from a .pdf datasheet into a spreadsheet, which can then be modified and then be turned into a KiCad Schematic symbol by a script.

There are quite a lot of side projects and scripts around KiCad. You can find an overview of more then 70 of those side projects on:

A word of caution:
KiCad V6 is getting close to release (Few months, maybe half a year) and it has a completely different schematics file format based on S-expressions. It seems unwise to invest a lot of time now in automation for KiCad V5.