I am using 81 pin 9x9 WLCSP package. The pitch is 0.4mm,and pad dia is 2.65mm.I have to fan out all the pins in 3.5mills spacing/trace width, but i couldn't, even grids were in metric units.
Following are the ways i tried:
I am unable to put stacked micro via,since kicad doesn't supports micro via in the inner layers. So, i tried of using buried via. since the pitch is 0.4mm i can't fan out some 15 pins in center. So i used VIP technology(via in pad). micro via(1-2 layer) on land and i tried of putting buried via on same place(2-3), kicad is not allowing me to put buried via on the same place(beneath micro via),means stacked via.
So please suggest some solution to fan out all the 81 pins in 3.5mills spacing/trace width. Or else please send me some sample Gerber which will help me a lot.