It is rare to actually run a device at the ratings limit, usually on the small package parts thermal considerations come into play.
Plus these days, it is common to find the ‘price minimum’ is rated well above what you actually need.
That said, if you do need to push highest current into small packages, that is usually done using filled copper pour areas. That also helps with cooling, as you want the highest copper plane cooling all the device leads.
To create a fill area, you tag the pin net name, onto the fill polygon. The fill area outline edges can be rough, as the fill clearances will pull those back automatically from other traces.
Check the device data to see if any pin has priority - ie if the die is mounted onto the collector leadframe, and wire-bonds to the other pins, the pin you want to cool the most is the collector.