Speaking personally, I would ignore it because
a) philosophically, it’s an output file, not a source file. It should be regenerated from the schematic and not kept in source control
b) the ordering of lines in the file are non-deterministic, i.e. there are many possible permutations to a netlist file that result in the same design, so I would not check it in to avoid useless changes showing up in the history.
I don’t think so…once the netlist is read by pcbnew the info is embedded into the kicad_pcb file, the netlist is not read again unless the user explicitly does an import.
But anyway, I tend to agree it’s an output file, although it can be useful to have in git as a regression check.
As above, it rather depends on your flows.
If netlist is easily generated from something already in source control, it is useful for regression checks, but not a required file.
If however the netlist is the master, then certainly it should be included. (see threads on using netlist-master designs)
Personally, I like archives to include output files as well as source, so you can verify a match anytime in the future.