On brief inspection, it looks like you’ve got at least a few resistors and capacitors that I would’ve just flipped around when hand routing (or flip the connections in the schematic and re-exported the net), but the autorouter gleefully ran with what you’d put in, wrapping traces around the width of the part. Which leaves it unable to route a trace between the pins.
Even if it can do that optimally, it is doing it under the constraint of not moving any of the footprints, right? So a (human) process which can move footprints, decide to use different pins, etc, can potentially do better on via count and trace length, even if it isn’t optimal.
Here’s a board with certainly more than 35 components and entirely hand routed It’s just a matter of time and experience. From what you’ve posted, it looks like the component placement (electrically) is completely disorganized, I’m not surprised the routing is so messy (it would likely be equally messy if the board was hand-routed)…
This is not exactly representative but it reminds me of a personal experience. I am a power designer. Around 20 years ago I was in Thailand, designing a switching power converter for my multinational employer. But my visa ran out and I had to return to USA before pcb layout got started. So it was designed by the pcb layout person who was not an EE and without consultation, and released for fabrication.
When I returned to Thailand, this board contained no netlist errors yet was absolutely 100% completely non functional. I could not get the slightest blip of power out of it. I have never before or since seen a case where bad layout by itself completely destroyed the functionality of a circuit. I suppose that an autorouter might have done slightly better than this layout person did. But my rule of thumb is that very few circuits are completely non critical with regards to good layout.
And I would add that the Thai people are really great but I found I do not like Thai food.
This PCB should be very, very easy to route. I use mainly 0603 elements at my PCBs and I can route a max of one track under each element. When you can route may be 10 tracks under element then you should have no problem. It looks that someone placed components absolutely logic-less.
The key question is always which elements have to be at specified positions. Place them and then place the rest of components making the connection lines to look as simple as possible. This is the main time consuming process in PCB design. If the connections looks simple routing with KiCad is simple - you just click the beginning of track and the end - KiCad makes the whole track.
It’s a bit off topic, but I notice your board does not have a groundplane.
This makes that the return currents of the signals have to wander around the board until they find some copper to complete the circuit. This creates a lot of antenna’s that will send and receive radio waves (interference).
I make my PCB’s with a solid ground plane at the bottom, with as little and as short of traces as possible on the bottom. If I can get away with it, I also create a second ground plane on the top, and stitch those together with via’s. This also allows me to home-etch the board without having to worry about alignment between top and bottom layer, I just have to drill the board for (some of) the via’s that stitch both ground planes together, and solder a wire there at both sides of the board.
Lot’s of via’s are no problem, until the board manufacturer starts charging extra for them. Long tracks are also not a (big) problem. If I have to choose between a longer track that runs over a solid ground plane and a shorter track with no ground plane below it, I happily take the longer route.
I don’t know if the Kicad autorouter can be taught to follow this philosophy.
Can you give me a intro to component placing 101 class? The way I did it was I placed all the components which require a fixed position due to the placement of the component for interaction with human. For example I placed the audio jacks and pots first.
I then placed the other components around the board such that it would be easiest to solder. Resistors together, caps together, etc. I understand that I should have rotated some of the resistors and caps such that the trace doesn’t have to route around the component. That seems like an easy fix.
Is the goal simply to reduce the rats nest such that the traces are as short as possible? What other considerations should I take when placing components?
Part alignment as an artform. And it is different for different requirements. A general rule of thumb is to try and reduce ratsnest crossings as much as possible. And even for small boards this might mean multiple iterations are required (get a first setup, try to route the board and take what you learn into the next iteration)
This should not be high on your list of priorities. In fact most of the time this is about the worst way to place stuff.
Caps are there for a reason. They should be close to something (and with close i mean with regards to how long the connecting trace should end up being).
For example a cap on a supply pin of an IC should be placed as close as feasible to that pin. And it needs very good connection to the same GND that the IC uses. This is done such that switching currents are taken from the cap and not from the power supply lines (without this measure other components might be negatively impacted via so called galvanic coupling).
The cap has a different purpose for analog chips where it tries to stabalize the supply line. Again needs to be close to the pin to effectively do that.
Input filters for external signals should be placed as close as possible to the input port (most likely a connector). And again ground connections need to have a low impedance path to the ground pin of that connector. This is done to ensure the nasty stuff (noise, bursts, …) does not get far into your board which in turn means there is less of a chance of some type of coupling.
Separate systems of your board. The power supply should be separated from the analog stuff and the digital stuff should be separate as well.
IF the placement is logical and the re-pinning of multi-chip parts (or GPIO) and the design is fully constrained (v6 type constraints) then why not use auto-route. By the time you have that information the design is fully constrained that it a computer can do the work
The problem is a lot of this information cannot be generated the moment you start the PCB part of a design and almost always it is an organic process as issues arise and parts are moved/rotated/re-pinned. In this case manual will almost always produce the better result.
For relatively simple cards a PCB engineer I use to work with would place the parts based upon my guidance (higher level considerations) and just it auto-route and then spend the next few hours jogging the design to satisfy his OCD or other considerations
I have only experience with 2 layer boards, and really only with SMD elements (I designed PCBs with TH elements so long ago that I had to design it using checkered card and pencil. Proper element placement is the biggest part of PCB design. Making traces as short as possible is the first step on the road. Placing resistors together and capacitors together is in my opinion absolutely senseless. I always try to be sure that I know which way each connection will go during routing.
With PCBs I route (one microcontroller + several elements around it) my strategy is:
all bottom to be used for GND. No other tracks there. In most PCBs I reach that goal. Sometimes I allow myself for one ot two very short signal tracks at bottom,
so I can hide GND connection lines during placement as I have GND everywhere one via from me. With KiCad 5.1.x to hide GND I delete it (text editor) from netlist (100% deletion) or place GND zone at top (close to 100% deletion - you have to press ‘b’ many times). With KiCad 6… as I have read it will be possible with no tricks,
define power supply that way thet I get VCC made near one microcontroller corner,
go with VCC under microcontroller (under but on top layer) and go out through all three rest corners and through its VCC pins (I use uC that have VCC at each side), that helps to reach with VCC elements around uC with no blocking (too much) other connections to uC pins. If you go with VCC around uC to connect it to all its VCC pins than you can’t connect anything to uC without jumping to bottom PCB side.
as uC pins can be flexible used for many tasks at that stage I select right pin for each task to untangle the connections as much as possible,
when I finish placement I in most cases know which way each track will go (I sometimes route some connections partially only to get the connection line out of the region I am interested to not disturb me in imagining which way the connections I am thinking about I plan to route.
But my PCBs are rather simple. I suppose that when someone has for example BGA (or many BGAs) it is not possible to imagine all connections during placement. But as he have not only 2 layers he has bigger possibilities.
There are many, many other considerations and sometimes the goals contradict each other.
The links I have given some time ago explain (among others) why I use all bottom for GND:
Few posts later in that thread I gave more links.
After reading all that you will understand most PCB design problems I think.
As I understand you are a programic/informatic man (if I were better in English I would probably wrote it differently) I associated it with one problem we had recently with software developers (in other firm).
I write it just because it is (in my opinion) a good example of how the software and hardware worlds differ. They just did something we had never expected anyone can be so thoughtless to do it that way. Imagine an array of 32000 data records (cards in access control system) stored in flash memory. Our program assumes that record filled with FFs or 00s not contains valid card so is skipped when searching for card. So if you need to delete one record you just program it to 00-s - one programming operation for one page (page need not to be erased first).
But someone there decided that in such situation (someone fired or lost his card) it will look better to not have empty records so we got a serie of orders to write 0s into n+1 record (erase it) and then program the right data into n record. To protect flash our program checks if it is possible to write data without erasing the page but as that record was just programmed to 0s it was never possible so each write needed to erase page first. He went through all array even only 5 records were not FFs. You can assume flash runs out by number of erase operations. So instead of 0 erase operations we got 32000 page erase operations. He should left that 00-ed record between others, but even not he could use the order ‘write FFs into records from 6 till 32000’ - it would not run out flash so much. By this solution he shortened the expected device live many times.
Maybe a bit offtopic, but I found one phrase in a paper by Texas Instruments kind of funny, considering that EE is very technical area of expertise. It said “as close as humanly possible”. Maybe that rules out using an autorouter
If the design wouldn’t work with 25cm clock line, then the constraints were not set up properly. Sure, a manual layout would have likely resulted in shorter traces which would have been more likely to work, but if there are specific restrictions, they should be in constraints.
It was not my design. I have never tried this autorouter. I don’t know if there were possibility to specify such restrictions. I even don’t remember what that device was expected to do.
What I’m sure is that after cutting out that long trace and replacing with wire it started to work.
I’m also not sure if it was signal and its clock. After rethinking I suppose that it was design with racing - probably just assuming that you can use slope to latch-in some state which is then changed by the same slope propagating through one gate.
The reason I don’t use the auto-router is because I don’t know how. In fact, I didn’t even know kicad had an auto-router until I read this thread. If somebody makes an instructional video, I will watch it and see if it is worth my time, or not.
Clock lines and other edge triggered control lines are always fussy about length. When they are too long you get reflections causing ringing on the edges and double clocking.
You start by placing components with clocked data near each other first and then the decoupling capacitors
Board layout is an artform. Autorouters are not artists.
If it were simply a ‘join the dots’ exercise then autorouting makes sense. But its not. Designing a PCB properly requires a deep understanding of how the circuit functions, and the implications of each routing decision. There are often considerations beyond basic circuit function (EMC comes to mind in particular) that can be quite difficult to distill into a rule set that an autorouter can follow. And inevitably there are compromises to be made. How do you code a compromise?
In the end a (qualified) human will do a better job than an algorithm.