Why courtyard is ‘big’ for this Murata 0201 MLCC capacitor? mouser part number 81-GRM035R60J475ME5D
Courtyards are to warn user to leave space around the component. Why so big?
Are below correct?
Should we ignore the pink courtyard outline and just use the pink warning outline
PCBWay can have 3 or 6 mil (among others) width and clearance and we entered 0.1524, 3mil.
When we placed components without the pink margin touching, it allows drawing copper trace as shown. It automatically dis-allow we to move copper trace closer in the ‘circle trace’.
I have never used element smaller than 0402.
My rule is minimum 0.25mm between anything (element, pad) and courtyard so my courtyard would be closer to element than these what you shown, but still not as close as you suggest.
I simply assume that from time to time you may need to grab the pieces with tweezers.
What are your factory parameters for solder mask and do you want it between elements?
I am no expert of SMT assembly. I have difficulty to hand assemble 0402s. In spite of my unsteady hands, I am not much worse than the other engineers I know; they also prefer to work with 0603 minimum for manual assembly. But as Piotr indicated, the courtyard is mainly to allow enough space for pick and place, test, and maybe other processes. If you are doing your own assembly by hand, I would recommend not going smaller than 0603 (better) and 0402 (absolute minimum). If your assembly process is controlled by manufacturing engineering, then they ought to be able to recommend the minimum courtyard dimensions.
I think this is a situation where many users will require their own custom footprint libraries. I use my own footprints, but mainly for the purpose of easier manual assembly. An example is a TSSOP with fat corner pads.
Mainly an addendum to my earlier post. These are my thoughts; I could be wrong:
Unless you know more than I do about PCB assembly (this is not a high bar) you probably should not be using anything smaller than 0402.
Your question suggests that you do not know more than I do about PCB assembly.
And…by the way, I like to use a minimum sized 0805 footprint for my 0603 chips. That is my default package and footprint, used wherever I do not need something bigger. This gives a bit of extra space for the tip of the soldering iron.
To me, the courtyard is not very big, but the 0201 (is that metric or bananas?) is very small. I guess that KiCad’s default libraries are designed to work as a simple default that is always usable. If you want to go as small as 0201 because your PCB is contained in size, then you are considered an “advanced user”, and are assumed to be able to design your own footprints (or modify the default ones) so they fit both in your design, and are manufacturable by the assembly service you use.
Also, which KiCad version are you using, and how old are your libraries? KiCad has been using rounded pads for most footprints for several KiCad versions now. (I think this was introduced in V6).
This is not my observasion. When I load a C_0201_0603Metric from KiCad’s default libraries onto a PCB, (observe the rounded corners) then I measure the distance from the side of the pad to the courtyard of 0.15mm.
May be the idea is test debug on size that can be handled by human. Then, redo at 0201 (imperial) (0.6 x 0.3 mm) size that can only be done by factory. No change by us on hand.
Here is my Kicad version 8 test using RP2040, pin pitch 0.4mm. Setting to 0.1mm.
PCBWay says use 0.15mm in most area as easier to manufacture. Can do 0.1mm in some small tight area.
On Kicad 8, I can have trace same pitch as pin. This is 0.1 mm seetting in trace width and clearnace. See below, it flag error when set to 0.15mm.
This is similar to the (open sourced) Adafruit RP2040 QT Py.
Many thanks for kind advises. Any area that you may suggest I need to know about PCB design and PCBA.
In past, I did not do these before as they were done by other team members. Now, I need to learn these properly with good engineering standard (for consumer items standard, not anything special nor advance)
Many thanks. I got your message about “advanced user” if 0201 (imperial 0.6 x 0.3mm) are to be used.
Is that ‘straight forward’ once I got set of constraint rules on trace width, clearance, etc. from PCBWay and just to draw it on screen and it passes DRC???
Presumably???, when I submit the file to PCBWay, they will check say OK, make (standard level) quotation price or they will say the design is too tight and need more $$$.
Being able to modify or design foorprints seem a must have skill. In past, we heard teamate (they did these, I did not have hands on that area) saying making some footprint slightly different to fit the machine manufacturing process. May be some solder/parts/pcb combination wets differently???
Ah hah, so this answers the thread question: Mouser publish it that way, whether intentional or unintentional, and only they can answer.
Meanwhile, Kicad, in their own Libraries, have an 0201 footprint with a much smaller courtyard that has been scrutinied and approved by the librarian staff.
To recap, you posted a question on the KiCad forum to ask why Mouser makes footprints with a big courtyard?
But it’s nice to read that the footprint from KiCads own library has the same 0.15mm clearance for the courtyard then PCBway’s recommendation, so apparenty it’s not only for “advanced users” but for anyone smart enough to use KiCad’s default libraries
On LEFT is placing until courtyard touch. It is 0.3mm between two R (verticle on diagram). This clearance is higher than the kicad lib for 0.16mm between two pad (horizontal) of ONE R
Now you are mixing up different things with each other. The thin red line around the pads is for clearance on the copper layer. It’s goal is to have enough room to etch the PCB with the resolution that the PCB manufacturer can make. It has nothing to do with placement of the footprints. With the right settings, you can see these clearance lines around all copper track segments in the PCB Editor. These clearances may overlap each other, but these clearances may not overlap copper of another net. That would result in a DRC violation.
The courtyard lines are intended to be a guide to keep enough distance between footprints to make it “easy” to place them reliable on the PCB. Different manufacturers have different quality (and generations) of SMT pick and place machines. There are a lot of machines that can not even handle 0201 parts reliably. KiCad’s 0.15mm margin is apparently a good choice for the courtyard. But this 0.15mm is also not measured very correctly. Note that the pad does not have the same width as the SMT part (resistor or capacitor), so what should you actually be measuring?
Because of the differences in equipment, you can not rely on the courtyard to be absolutely correct. If you really want to know, then ask the factory that you plan to do the SMT placement for you. How good are their machines? how much margin do they need between SMT parts to place them? And then you can modify your footprints to have a minimum courtyard that works with their machines, and use them in your KiCad project. We on this forum can not tell you how big the margin for the courtyard should be. KiCad’s libraries are a “best effort” that should work in most cases, but it’s always a compromise, and in the end it depends on the SMT PnP machines of your manufacturer.
Also, rework of such small parts is no fun, I’d rather err on the cautious side as long as the area on your PCB is not critical.
so this answers the thread question: Mouser publish it that way, whether intentional or unintentional, and only they can answer.
but for anyone smart enough to use KiCad’s default libraries 
