I thought that by setting the copper layers as VCC and GND respectively, the thermal release would mark all the VCC and GND pins as routed, since in reality they would be all routed.
What is the best way to label VCC and GND in the schematic so that the PCB doesn’t complaint about unrouted paths? Can I disable ONLY the VCC and GND warnings so that I know if there is a real problem with my PCB.
If you look carefully at your pcb your gnd plane is all cut up by the traces into disconnected islands. That’s why you get unrouted pins. They aren’t actually electrically connected.
For all pins to be routed there has to be copper path through traces/vias/zones from each pin to every other pin on the same net.
My first thought seeing your PCB was: you don’t use vias to connect GND fillings at both sides.
The next thought was: you probably decided that one side filling is VCC and second is GND.
Such assumption is probably good for 4 layer PCB designd where you can have whole layers for GND and VCC.
In that PCB probably (only probably - I have never designed PCBs comparable to that one) the better way would be to make both sides filling be GND. Connecting them with vias makes no problem to get with GND to any point on your PCB but you will need to reach all neaded pads with VCC tracks.