Where is the documentation for how to define a bus in 6.x?

[Meterman2026]

I made a minor update to a schematic that has two buses (address, data), and ERC throws a bunch of errors saying that a given net is graphically connected to but is not a member of the bus.

So how do I update the buses so they play nice in 6.x? Documentation is still written for 5.x.

(6.0.4, macOS)

[mf_ibfeew]

The question is very unspecific. So as general answer look at the busses-section of the documentation:

Schematic Editor | 6.0 | English | Documentation | KiCad

A short summary for bus-definitions can also be found in every label-properties-dialog. There is a shortcut to “Syntax help” which also shows some basic types of bus-definitions

[borelm]

I don’t think the question is unspecific. KiCad buses do require net labels for every entry. Therefore they are connected anyway. Buses only serve aesthetic purposes. You can cut the bus short and do not need to connect the bus sections. Having said that if you connect net names not complying with KiCad bus namimg convention (name ending with numbers at the end with no replicated number) you will get the warning ‘signal connected to bus but does not belong’ warning messages do appear. One can simply ignore them. However, in version 6 there is an item called Bus Definitions in the tools menu where you can assign net names to a given bus name. I have tried it and it seems do the bus assignment. However, I have not been able to attach this bus name to bus sections by labels, hierarchical labels or global labels as one would naturally expect. This menu seems to be very useful and correct way to handle buses provided there is a way to attach the constructed bus lists (with the net names assigned in the menu) to physical bus sections on the schematic. I will be obliged if someone can explain.

[paulvdh]

@borelm

if you connect net names not complying with KiCad bus namimg convention (name ending with numbers at the end with no replicated number) you will get the warning ‘signal connected to bus but does not belong’ warning messages do appear.

You can ignore them, but the appearance of those messages should already have made it clear that KiCad is aware of connections to buses.

There is some more info in this thread:

Kicad 6 Bus tutorial

Hi, I am testing Kicad 6 for the first time. I worked with 4 and 5 for years but i am also trying busses for the first time. I found some tutorials on Youtube but i hear busses changed in v6. Does anyone have a good tutorial on this? At the moment i did it like this: [afbeelding]

And I attached a little test project which brings a bus though a hierarchy in this thread:

Replicate layout doesn't works with bus in hierarchical schematic

I think you have to name both the individual wires and the bus itself in the hierarchical sheet. Have a look at this: [image] Resulting in: [image] Note that only members 0 through 4 are part of the named bus, and those are the only connections that get though the hierarchy. Note that the names are case sensitive. Note that “BUS_0” also gets through the hierarchy, even though it only has a local label and does not appear to be physically connected to the bus. Note that pins 5, 6, and 7…

[ML9104]

@borelm

I will be obliged if someone can explain.

KiCAD 6 bus naming needs two elements:
All bus entry/exit connections must be labelled. This is no different from earlier versions.
The bus itself must be labelled. There are two ways to do this:
1: If you have a data bus with the entry/exits D0, D1, D2 … D7, the bus could be labelled D[0…7].
2: If you have a bus with entry/exits like TX, RX, CTS, RTS, the bus can be labelled {TX RX CTS RTS} or SERIAL{TX RX CTS RTS}.
Note the difference between square brackets and curly brackets.
This will get rid of ERC Warnings.

Cheers.

EDIT: the really smart editor on this web page unfortunately converts a double-point (. .) to an ellipsis (…). Double-point for the data bus example is correct.

[borelm]

Thank you very much for explaining the use of curly brackets for non sequential bus entries. What I am wondering is since this can be done by the Bus Definition utility of V6 why can’t we simply use the bus name? The bus class for the alias in question is already defined in KiCad anyway. Thanks again.

[ML9104]

Here I’m over my head. I’m just a user, not a developer.

[paulvdh]

KiCad leaves it up to you which method you want to use.
A Vector bus (with the square brackets and two dots) are the simplest.
A Group bus has all the names spelled out between curly braces, but when you want to use such a bus on multiple pages (or just shorten it’s name) you can use the Alias system and then just use the alias name on the bus itself.

It’s all explained in the manual: Schematic Editor / Help / Help and then chapter 6.5.3 (Or just search for “bus” in the manual).

[borelm]

Thanks again. I tried it with the following results.

• As before labeling of each entry and exit ensures connectivity. Connection to bus do not matter
• However, if the bus is not named then one gets the ‘Connected to bus no net’ message as would be expected.
• Naming the bus with correct entry definition gives the checking advantage whether any wrong entries are connected to the bus.
• You do not need to define the bus at the hierarchical origin necessarily but must define a section of it with global labels somewhere (once only - preferably on the actual sheet). All error ERC messages disappear and the netlist file seems to look fine
• This is what we also had before V6. I played with the bus definition utility of V6 but doesn’t seem to have any effect on above operations. I am working on it. Probably (and hopefully) the utility will let us define the bus once there and let us just use the name without any brackets and log lists at all! There must be some V6 user manuals somewhere. Thanks and best regards to all.

[borelm]

p.s. I have just noticed Paul’s help and ch. 6.5.3 comment. I will look into these sources. Thanks.

[ML9104]

@borelm

• Naming the bus with correct entry definition gives the checking advantage whether any wrong entries are connected to the bus.
• You do not need to define the bus at the hierarchical origin necessarily but must define a section of it with global labels somewhere (once only - preferably on the actual sheet). All error ERC messages disappear and the netlist file seems to look fine

Thanks for your effort and feedback, that’s helpful to me as well, especially the hierachical part. I haven’t worked with that before.

[paulvdh]

I’ve been playing a bit more with these buses.
If you have a bus with named members, then you can right click on the bus, and choose “Unfold from Bus” and select a name from the list, and I think this is new in KiCad V6.

I’ve also added some aliases to my example, and grouped them under the name “BBUUSS”. And these aliases can be used as a separate bus, or as a part in a group bus.
Note the: Music.Gretl name.

The example is just two instances of a hierarchical sheet, connected on the root sheet, but with the Truck and BUS signals cross-linked. The example is free from ERC violations.

2022-07-06_asdf_hierarchical.zip (13.6 KB)

[borelm]

Thanks very much for the information Paulvdh I have checked the bus definition from the manual (not available in my installation but can reach it on the web). Everything works perfectly with ‘Bus Definition’ option. All that’s needed is to create the bus label with the alias inside curly brackets. Much preferable to vector or group bus definitions. If any modifications are needed for the bus doing it once at the definition table is all to it. Sequential nets members and single group members are also mixable as with labels. ‘Unfold bus signal’ option with ‘C’ shortcut key is also a very efficient time saver.