What is the proper name for vias under solder mask and how to make those?


I’m making a small PCB with a bunch of vias on it. When I look at the preview render I see those are not under the soldermask, but I want vias to be covered with a soldermask (when I’ll order those PCBs). How to make that?

I tried to set the vias as “buried”, which gives the render as I want, but raises DRC error “Buried vias are not allowed by design”.

P.S. Using Kicad Nightly, PCB with 2 layers only.

“Buried Via’s” are something diffferent. A buried via is not visible from the outside of the PCB. For example, if you have a 4 layer PCB and have a via that connects only layers 2 and 3 (the inner two layers) you have a buried via. This is an extra production step (Drilling before outer layers are applied) and deviates from the most common way of producing PCB’s and will very likely cost you extra. If you’re interested in learning more about the production process of PCB’s then watch some Youtube video’s. Eurocircuits for example, has made a bunch of them of their process of PCB manufacturing.

What you mean is a “tented via”, and this is a setting during creation of Gerber files. It is in: Pcbnew / File / Plot / (Plot format: Gerber) / General Options: Do not tent via’s.

Because this is a setting for the Gerber files creation only, and therefore can not be viewed properly in the 3D viewer. So to see the differences, you have to create a set of Gerber files, and then load them in Gerbview (or another gerber viewer).

According to some, via’s should not be tented (covered) on both sides of the PCB. Apparently it can lead to trapped gas inside a via which can lead to problems as it expands during heating of the PCB during soldering.

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OK. Thank you for your explanation.

Perfect explanation.

I would not bother about the gas. The fabricator will make a very small hole in the mask on one side. The via pad will remain covered by mask on both sides, as it should. And so will most of the hole.

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