Noob question, so apologies in advance. I have a schematic that has an amplifier-A/D input that terminates at a jack connector on the board edge. Also on the schematic I have the load cell assembly drawn that terminates in a mating plug connector. When I run an ERC on the schematic it, quite understandably, gives a pair of errors for each wire across the plug-jack pair. All pins on the connectors are set to passive.
These errors can be eliminated by joining the connectors with shorting wires. However, this is a bit “dangerous” because if I forget to remove them it will be a pain.
What is the best way to show this plug-jack pair? Can they be show in their mated position some way? Or should I just set the connected device pins to “passive” (which feels like a kludge)?
I realize this is a trivial problem given the workarounds, but if I am going to learn KiCad I want to learn the correct or customary way to do things.
Sorry if I was a bit vague. Here is a screenshot of the assembly and the errors. Since I originally posted I moved the assembly off of the main page and into a hierarchical page, but that made no difference.
All of the connector pins are marked as passive. Ein is an input on the scale assembly and a power output on the HX711 module.
As I am typing this I see why KiCad is confused. There are two issues here:
Pin 5 of ASSY201:
This is the same issue as I am having on the main controller assembly. Apparently there is no clean way to show internal pin connections on modules or components. For example, in this case the HX711 module schematic has E- connected to Ground.
But when it gets used outside of the module the driving pin (Ground) is not exported along with E-. I am also having the same issue on the Microcontroller module where several pins are all internally connected to each other.
According to my search of the KiCad documentation, this forum, and the web, the only way to handle this is mark the duplicated pins as NC and passive while simultaneously using only one pin as the true connection and making all schematic points tie to that. You would then manually need to adjust the ratsnest when doing the actual layout. If anyone knows a better work-around, I’m all ears.
Pin 1 of ASSY201:
This one is a bit more subtle, but similar. If you look at the HX711 module schematic Pin 3 AVdd of the chip is an input. It is driven by a voltage from the regulator Q2. This then is output via E+ to the scale.
Overall, I can explain all the errors and the schematic is correct. But that leaves me feeling that I am using KiCad poorly or doing something less than optimally. Thanks to everyone who is willing to help.
I am designing few PCBs a year (at beginning using pencil, rubber and mm-paper, then from 1988 using a PCB software). When 1.5 year ago I begun being interested in KiCad I first time noticed existence of ERC. Now I know that my software had it also, but, as I was never looking for it I never found it and I had never filling that I am doing something less then optimally. DRC I was using always (of course not in pencil/rubber times).
In KiCad I not plan to stress myself by running ERC