The hierarchal block template system is able to recursively array schematics of arrayed schematics (and so on), but which present tools exist for bussing the signals which are exported from the root of those nested arrays?
Nested busses would go a long way and I have moved my original question surrounding them here, but until they exist (if ever), what recourse does someone have when striving not to manually name nests within nests within nests of signals?
Example
The hierarchal block template system may be used to array [16 x 16] hierarchal sheet blocks, each consisting of the same 7-segment display. The 7-segment display template in turn consists of 8x hierarchal sheet blocks consisting of 3x LEDs (RGB).
Nesting the 3x LEDs (6x pins) within a bus alias (rgb_0) and passing it on when nesting the segments of the 7-segment display within a bus alias (digit_0{rgb_0}) and passing it on when nesting all of the [16 x 16] digits together (digits_0{digit_0{rgb_0}}) immensely simplifies this … but it is not possible.
What is recommended instead, beyond uniquely naming 16 x 16 x 8 x 6 signals?
Perhaps I’m missing something, but it seems like you could flatten it out a little by passing all 8 (6-pin LED) busses up from the digit level to the top level. Not the most convenient to draw and the top level schematic would get very dense after you break out all those signals, but then again you are dealing with 16x16x8x6=12268 signals so that density is guaranteed to show up somewhere. Presumably there are other chips involved though, so another option would be to move those other control chips down in the hierarchy so you don’t have to pass up as many signals.
You will have to draw the wires / buses through the hierarchy.
Alternatively, Maybe you can use skidl. Skidl is a python library to generate a KiCad compatible netlist, and instead of drawing a schematic, you just declare schematic symbols and ad attributes such as PCB footprints and connections. I see it as a sort of VHDL euqivalent for PCB design. As you can use arrays and loops, it is well suited for some type of PCB’s. For the sort of PCB I design it however of not much use, and drawing an old fashioned schematic suits better for the things I do. It may be an excellent choice though vor highly repetitive schematics.