Thank you for the feedback.
Some simple questions:
- did you notice, that any PCM manufacturer was not able to process the standard footprints provided with KICAD?
Please tell me if your answer is different to “no”. - what are the cost driver of a PCB?
For me this are:
- Number of layers
- board size
- technology (line width, drill diameter)
-special items (buried vias, filled vias, …)
One of the most important thing at the beginning of a project is to select the technology you intend to produce the board. By maintaining the technology design rules the manufacturability is ensured. The standard design rules implemented in KICAD are such that nearly every PCB manufacurer can handle them in a cost effective process. There design rules are applicable to a standard design for low voltage operation. Enhanced technologies allows smaller pitches (line width and space) even into the range of the IPC limits and below. So the discussion above does not really deal with manufacturability but with cost effective way to
make a PCB.
- Where is the clearance used?
First of all, not by the manufacturer. When the manufacturer gets your gerber data, the first thing they do is to run a DRC (design rule check) with the limits of the ordered technology. If this is OK, fine.
They don’t care about distance or overlap of the clearance. That is an issue of the DRC in KICAD. So for the setting of the clearance two limits needs to be respected: First the design rules of the manufacturer for your selected technology, second for the operating voltage of your board (or parts of the board). The DRC will show violations of this distance, which means, that the voltage hardness is not given at that point or the technology limits are not met. The latter can be handled by redesign of change of technology. The first must be carefully redesigned (no real alternative). The mentioned differential tracks are one more sophisticated setting since you need to respect the material and layer thickness of your PCB process.
As I mentioned, with the standard settings of the KICAD suite you are on the safe side for the manufacturability for most PCB manufacturer. But if there are some deviations in clearance you need to think about electrical issues, which may have a much sever impact than manufacturability…
And this is at least the answer of the initial question: These lines are indicating the minimal distances to neighbour areas. They are indicating the design rules for the selected technology in combination with electrical requirements and can be adjusted for each project in the way it was shown above.
These lines can overlap; a design rule violation is given by the explanation above when this clearing line is overlapping any neighbour metallization (copper line, filled area, pad, via…).
These lines are used by the DRC to ensure a proper layout which fulfills all technological and electrical limitations for your project.
They are used by the auto-router too to have a proper distance to the pads, which can also block routings through two neighbour pads. By this mechanism DRC errors are mostly excluded for drawn lines.