Voltage rails automatically sharing a net

I am creating a PCB using positive and negative voltage sources, and after creating the layout, adding a few things in the schematic and trying to update the PCB from Eeschema, all of my negative voltages changed to positive voltage.

After investigating the issue, I observed that the different voltage sources were somehow sharing a net. I have disconnected the two sources from all other circuits where there could have been a junction and re-highlighted the net to make sure it was up to date, yet I’m still getting the same error :frowning:

Here’s what it looks like, there’s a good chance I am doing something simple incorrectly. Thanks in advance for any help!

In KiCad, power symbols are global labels
If 2 nets with different global labels are connected then KiCad simply picks one of the net names. Global labels also ignore the hierarchical structure. Al Global labels with the same name across all sheets are connected to each other.

For a more robust solution, you can define the connector pins which bring power to the board as power outputs. ERC will complain if 2 power outputs are connected to each other.

There is probably more about this in the faq section of this forum. That is the most up to date documentation for users at the moment.
https://forum.kicad.info/c/faq

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