Void on pcb from component on back layer

[dancom81]

Hi,
I’m using KiCad 8.

trying to design a PCB with 2 layers and placing on the back a component.
don’t know why but if I set the “back” on this component then it creates a “void” in the 3D view, but worst problem is that it doesn’t allow me to use this area in the layouting also in the front layer…
e.g. cannot connect tracks.
does anyone know what could be the problem?

thanks

[eelik]

There are so many things in the images that it’s impossible to say. You can for example create a copy of the project and delete everything except the board edges and the problematic component (and other necessary details) to show the problem and nothing else. Then post the images, or better, the zipped project.

[paulvdh]

How do those modules work? How do you get them into KiCad? I am guessing you are importing footprints which have lines on the Edge.Cut layer.

[dancom81]

Hi, yes you are correctly. I mistaken copied an existing pcb layout and add it as new component in my footprint library. As you say the layout lines were defined as “Edge.Cuts” layer and this created the problem. corrected as “F.Fab” and now works properly.