I have a circuit that I can find no way of laying out with just traces on B-Cu.
So my plan is to design a two sided board in the PCB Editor, using large vias (eg 1mm hole, 3mm via) connected by traces on F-CU.
When I plot the Gerber files, I’ll only export the B-Cu layer, edge cuts and a drill file and, once CNC’d I’ll just connect the vias with jumper wire on the top side of the PCB, along with the other THT components.
(I hope that makes sense as an explanation.)
As far as I can see, there’s no reason why this won’t work. But am I missing some vital piece of knowledge about vias that means it won’t.
This seems like a perfectly valid way for DIY etching (or milling). Whether DIY etching / milling is a good choice, that is another question.
When you have a PCB manufactured, you usually get the second layer for free, and you can’t compete with dual layer + via metalization + 2 solder masks + 2 silkscreens for the low cost of modern PCB fabs. But there are still valid areas such as “just for fun / DIY”, and very rapid prototype turnaround where you can do multiple iterations in a day. (LPKF is a company that is serving this niche with quite expensive milling machines too).
But I do think there is a smarter way for DIY…
I also have a DIY mill capable of milling PCB’s, (But I have not done so yet). One thing you really want in a (digital logic) PCB is a good GND plane. You can easily buy FR4 with copper on both sides. Instead of milling one side and leaving the other bare, you can also mill one side, and use the (already existing) other side (usually the bottom) as a GND plane. This significantly improves grounding performance, and it also clears up quite a lot of room on the other side, because you don’t have to lay down tracks for GND anymore. This is a bit problematic for THT, but I think it can work quite well for SMT designs. You have to be careful of how to connect the GND plane to the GND pads of all your parts. There are hollow rivets for this, or you can use wires bent into an L shape.
And if you still need to make extra wire bridges, you can enable the inner layers in the board setup and still “abuse” them for this.
Your approach totally works. Using 0Ohm resistors of course also works, however you then have the 0Ohm resistors in your schematic. I feel both approaches are equally good and really just a matter of taste.
With Zero Ohm resistors, you also have a mostly fixed length, although you can of course assign resistor footprints of different sizes, or create some footprints specific for wire bridges. KiCad also has a mode in which pads of footprints can be “freely placed”, but this was always a weird duck in the herd. After a bit of searching it’s still in KiCad: PCB Editor / Preferences / Preferences / PCB Editor / Editing Options / Editing Options / [ ]Allow free pads. IMHO, this option should be a property of footprints. For most footprints this does not make sense, “stretchable” wire bridges are one of the few where this has some usefulness.
But by using vias and tracks on a “spare” layer, you have a lot of freedom of where to create the wire bridges and which length they have. and a printout of that extra layer gives you a clean and clear overview of where to solder the wire bridges.
This approach is not bad, but for a THT design you’ll have the components mounted on the GND side, which needs extra processing. You’ll have to chamfer all GND plane holes (except GND) to have pin clearance. But that’s perhaps not a big issue with a CNC engraver (mirrored drill pattern).
You’ll might also need thermal reliefs on the GND plane. I’m not sure how to do that.
Personally, I’d prefer a selection of 0-ohm resistors (or jumpers) in 0.2", 0.3" and 0.4" (5, 7.5 and 10 mm) spacing.
Representing that in the schematic is a pain, of course, with several iterations of “update PCB” and "update “schematic”.
Thanks all.
I’d ruled out zero ohm resistors precisely to avoid having to work out where to clutter up the schematic. I hadn’t considered their fixed lengths. Two excelent reasons to “misuse” vias.
I know you can get double sided FR4, but I’ve not experimented with milling two sides yet. And I’m currently using phenolic boards. not FR4, as they don’t eat millends quite as quickly. But that’s OT.
(I knew someone would tell me I should get boards manufactured rather than CNC-ing them, but the naysayers will never get back the time they they waste saying it. )
((No offence intended.))
No, the Idea is you still mill only one side. And then drill through it only to make “via’s” to the GND plane. There is no milling at all on the (presumed) bottom layer.
There are methods for dual sided milling. Usually this incorporates drilling alignment holes in the PCB (outside of Edge.Cuts) and then turning the PCB over and using those pins to maintain alignment. It’s a built in function in some PCB milling software, but I don’t know further details.
None taken. I added a few valid reasons for milling in an attempt to cut off that discussion direction.
FlatCAM does two sided boards and I’ve CNC’d two sided timber, but that doesnt require sub 0.5mm accuracy.
I’m planning to try flipping the board and engrave a pseudo-silk screen at some point.
As for a ground plane on the component side … that would certainly have benefits, not least making routing easier, but it would put more emphasis on solder mask, and again, I’m not that far down the slippery slope.
At first moment I have also thought about it but when you have no soldermask using vias is simpler. During routing you simply use second layer.
Using test points you (with standard workflow) should add them to schematic to be connected with correct net. You can do it (I have never tried) also directly at PCB (and protect them against next Update PCB from schematic) but vias are simpler, I think.
Why haven’t you simply checked this yourself? KiCad has a whole library for testpoints, and you can also easily modify them or create your own.
But testpoints won’t work very well here. First, you have to add them to the schematic just like zero ohm resistors. And second, just a testpoint won’t break the net, so you will still see ratsnest lines and KiCad wanting to connect on the PCB. (You can fix this by using the “two pole testpoint”. But if you really want to go this way, I suggest you make your own symbols and footprints. If you make the symbol look like a net tie, it will be quite unobtrusive in the schematic.
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