I was not able to get Vias to connect to filled polygons through multiple layers. Filled zones were not completely filling their outline in my design. ( I am assuming it is because of the proximity to adjacent pins on the chip.) In order to get a nice looking board that can have vias I have used both filled zones and polygons. Is this the right way to do it?
Thanks!
It’s not clear to me what your problem is. I see a zone with some via’s on the right. For a via, the orange circle is the hole, while the white is the annular ring (which is copper).
I think you used some graphical polygon on the left. Are there also via’s in that? (probably partially covered by the polygon? The finished results are probably very similar. In KiCad V8 nets can be assigned to graphical items (this is new) The main difference is that a polygon will just be as drawn, while a zone (semi) atomagically keeps clearances both from internal and external entities belinging to other nets.
Since I am not seeing the annular rings on the left I don’t believe that they are connected to the appropriate layers. I am trying to connect the top and bottom of a 4 layer board in this example. When I select in the via preferences that they should connect to the connected layers I see no annular rings in the graphical polygon section. When using zones I can see the rings. I have set all zones and vias to the appropriate net.
To me it looks like the copper of the polygon is overlapping the annular ring of the via, but I can’t be sure from just a screenshot.
If you want to be sure, then generate a set of gerber files, and analyze them in KiCad’s gerber viewer.
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