I’m running KiCAD version 5, and I’m noticing an issue with GERBER files. It’s an issue with Soldermask on Vias. It seems the topic has been approached before, but I’m noticing something strange when I’m generating my files.
When I generate my files, I check the box marked ‘Do Not Tent Vias’, so naturally, I expect that the vias on my board will not be covered with soldermask. However, once I examine the GERBER files through the GERBER viewer by viewing the copper layer and the soldermask layer, the areas where the vias are located at are covered with soldermask. Once I try this again, unchecking the ‘Do Not Tent Vias’ box and viewing them in the GERBER viewer, the soldermask covering the vias are gone.
Does anyone else find this issue strange? It feels like that this option is doing the exact opposite of what it is supposed to do.