Via visibility rationales?

Is there a discussion I can read about the rationales behind the visibility (or not) of vias?

First, they are made with copper, yet it is possible to have the F.Cu layer turned on, and the vias hidden by virtue of the Objects > Via transparency control. This diverges somewhat from the F.Cu toggle conveying ground truth about where the copper is on the Front layer.

OK, maybe there is some utility in being able to hide the vias when viewing congested areas on a many-layer board.

But then there’s the opposite puzzle. For some reason, vias become visible when any of several other non-copper layers is made visible. (Assuming via transparency doesn’t hide them.)

Here, for example, is a screencap with just F.Silkscreen enabled. There’s a via just above the “Q1” annotation. By comparison, the through-holes for Q1 appear much more subtly.


I can understand vias becoming visible for copper layers of which they are a part, but what is the rationale for forcing the vias visible when viewing just the F.Silkscreen or F.Paste layer. Here the vias seem more distraction than useful (especially with via stitching), and don’t correspond to the results that will appear on the Gerbers for those layers.


Always include the used Kcad-version (and maybe the OS).

for v6.0.9: I think the yellow circle is only the via-hole, not the via copper. Because the hole is independent from the layer it is drawn on all layers. You could change the via-hole-color in the global Preferences (Preferences–>PCB Editor–>Colors–>Via holes). Customize that setting to your liking (I have set Via holes color == background color).

for v6.99 nightly: there could be a bug, I need to look further.

Yes, sorry, I’m using 6.0.7. The color change suggestion would come in useful to somewhat modify this behavior, I agree.

I also concur that the yellow area is indeed the hole. The entire via only appears when the copper layers are turned on. So my previous description was a bit off.

But now you prompted to think about the color scheme, I’m noticing that the color arrangement used for vias is rather at odds with that used for TH pads.

The “egg” color used for the TH pads matches the color used for the via hole. The TH pads use black for the hole, which seems intuitive, and would seem a better idea for the via hole as well. And the via uses white for the annular ring, very different from any of the copper-layer colors, so that’s a bit off.

Anyhow, those color issues I guess I can just configure to taste, as you say.

Colors aside, I’m just more curious about what utility I may be missing out on by this behavior where the PCBNew makes the vias visible for layers that don’t seem to warrant it.

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