I just watched the Youtube video about via stitching. The guy on video created the via footprint(the right model on the picture) and used it for the via stitching. So, I got two different via. I would like to know the differences… I guess there would be no problem if I use the default via model( the left on the picture
) for the stitching. It sounds silly but…I really like to know that…
KiCad handles them differently. For example vias are pushed away when you use push&shove routing, footprints aren’t. Vias aren’t exported to STEP 3d model. Certainly there are other things, these just popped to my mind.
The physical board, however, will be identical, it doesn’t know the difference, and even the generated gerber files and machinery which uses them is often agnostic about it.
In some earlier versions of KiCad stitching with vias was difficult. In the recent versions it’s much easier. That may be the reason why in some older videos they use footprints, assuming it’s about KiCad.
The video might also be from before kicad version 5 as there was no way to have a via from zone to zone in these versions.
By default via’s are tented (have solder mask over them) while THT pads have exposed copper.
The “REF**” of the THT pad via indicates it has not been assigned a refdes in the schematic. Depending on the settings while updating a PCB such components may get deleted automatically.
And as Reny wrote, the video is verly likely from KiCad V4. In KiCad V5 via stitching is much improved.
Just to add, there some roadmap to implement the via stitching https://bugs.launchpad.net/kicad/+bug/1731763
Would you be so kind, bbrotherone, to post the URL to the youtube video so I can see what you saw?
sorry for late reply…
This is what I watched before.
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