I have just received my first-ever boards designed in KiCad. They’re fine, except the vias are not connected through the board. On the board, they look like tiny pads, not drilled and plated holes. Is this correct?
Suggestions for troubleshooting thisproblem would be very welcome.
Are you sure? Often the solder mask covers the holes, so they might not look like holes (known as “tented” holes). If you have other holes that are drilled and plated, it’s unlikely the vias went wrong, they are all treated the same.
If you check with a meter it would confirm whether there is a connection.
Are you absolutely certain there is no electrical connection? (Have you checked with an ohmmeter?)
Many board fabricators can create some absolutely tiny vias - e.g., a 15 mil (0.4mm) hole in a 25 mil (0.6mm) pad. As I recall, even the “Default” via in KiCAD is an 18 mil (0.45mm) hole in a 38 mil (0.95mm) pad. To my superannuated, tri-focaled, eyes those dimensions are barely discernable without magnification. I over-ride the standard KiCAD via with a via that’s a 20 mil (0.5mm) hole in a 40 mil (1.0mm) pad, which isn’t much easier to see.
In KiCAD, what dimensions did you specify for the vias when you laid out the board? Is it possible that your board fabricator “did you a favor” by substituting a smaller via in place of what was on your Gerbers?
I took the default dimensions for the vias, whatever that is.
Checking this out, I scraped the solder mask off, both sides, and got down to bare copper. When I hold the board up to the light there’s no evidence of a hole there. And really, the pads look so impossibly tiny I can’t imagine how a hole could be drilled through them.
KiCad generated two vias with hole size of 0.4mm which is the default, so I don’t see anything wrong there. So I if there is an error, it was at the fab house.
Possibilities
Their CAM software didn’t read the file properly
They rejected holes because the annular ring was too small
They rejected drill because it is too small
The drill broke and no one noticed
etc
Some cheap Chinese fabs offer “free e-test”, but I have had faulty boards even with that, so I am skeptical they actually run an e-test on all boards.
A via should look like a very small pad, with a drilled-and-plated hole in the middle of it. As @bobc mentioned, the current practice of many (perhaps most) board fabricators is to cover the via with soldermask on both sides, so the hole may not be obvious. And, to check the continuity, your probe needs to break through the soldermask.
In PCBNew, look at the parameters for some of your vias. Verify that a reasonable-sized hole is specified. Is the hole size at least as large as the smallest hole your board fabricator can deliver? Is it specified as a standard plated-through hole, not a mechanical mounting hole?
Plot a “Drill Map” of your board in *.PDF or postscript. Are the via holes called out, and do they appear to be in the correct locations?
Open your Gerber files in your favorite Gerber viewer. (I like “gerbv” from the geda project.) View the Excelon drill file in conjunction with copper layers. Do you see holes at the via locations?
If all of these investigations seem to show a properly-specified board, and you are still convinced there is no electrical continuity through the via, you need to contact your board fabricator. Can you sacrifice a board? Cut the board so the saw kerf passes near a via. Then use sandpaper or a file to carefully expose an edge through the center of the via. Examine the location with a toolmaker’s microscope. You should see the hole, and its plating. If not, snap a photo and ask your board fabricator to explain what’s happening.
The Excellon file format is pretty easy to hack, though I prefer to let a Gerber viewer interpret it for me. Looks like your drill file calls for two “tools” (circular drill bits), of 0.4mm and 1.001mm. The smaller tool is used twice, to create holes at (132, -105) mm and (139, -105)mm. Did you by any chance specify some kind of offset, or auxiliary axis, that would place these holes at locations where they shouldn’t be? (That error should have affected ALL of the holes on your board.)
@bobc, @dchisholm: Thanks for being so generous with your time and knowledge. Lots of things for me to look into, and I’m looking forward to getting to it. I suspect that it will turn out that my vias were just too small for the board house to manage, but time will tell.