Just started with 6.0—
Does anyone want to explain what is wrong with the via on PIN 30 of ADC1? Looks to connect to the ground plane but when I run a DRC check it is declared unconnected.
Fritz
PD_reader_REV0.zip (1.1 MB)
Maybe I spoke to soon. Removing the added via the ground connected just fine. I had added the via because I think my original draft had too narrow of a ground plane to the pins.
Fritz
The error says “Via not connected or connected on only one layer”. And that was the case, it was connected to only one layer. The backside is +3V3.
[EDIT] So the via was pretty useless in the first place 
Yep. I guess with new software i am just a little edgy. All told 6.0 is great!
I still have to look into the other warning regarding silkscreen overlap
fs
There is always a learning curve. For all of us. I assume you already found the setup parameters governing some silkscreen DRC errors:
Hmm–my settings only shows the 1st item in the oval: Minimum Item Clearance
and that is already set to zero.
I am running:
Application: KiCad PCB Editor (64-bit)
Version: (6.0.1), release build
Libraries:
wxWidgets 3.1.5
libcurl/7.78.0-DEV Schannel zlib/1.2.11
Platform: Windows 10 (build 19042), 64-bit edition, 64 bit, Little endian, wxMSW
Build Info:
Date: Jan 15 2022 13:36:27
wxWidgets: 3.1.5 (wchar_t,wx containers)
Boost: 1.76.0
OCC: 7.5.0
Curl: 7.78.0-DEV
ngspice: 35
Compiler: Visual C++ 1929 without C++ ABI
Build settings:
KICAD_USE_OCC=ON
KICAD_SPICE=ON
fs
Oh, sorry, I’m on 6.99.
Minimum Item Clearance and that is already set to zero.
You have 3 “silkscreen” overlap-warnings (where the text-items “25, 30, 35” overlap the horizontal lines on the right side of the pcb, on bottom.silkscreen-layer). This particular DRC-test flags errors/warnings where one silkscreen-element overlaps another silkscreen-element. The setting “0” means there is no clearance necessary, but overlapping is still forbidden. If this is of no value for you the test can be disabled (set violation Severity for silkscreen Overlap to “ignore”).
Interestingly the tooltip on the “minimum silkscreen clearance”-field says: “Note: Does not apply to multiple shapes within a single footprint”. But the flagged items all belong to the footprint J1 - so if the tooltip is correct this could be a drc-bug?
He he… I’m glad I’m not the only one this happens to…
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