Via, no annular ring on uncoonected layer, drawback?

Hi,
I’ve seen the option to not draw the Via annular ring on unconnected layer.
this should improve the ground plane integrity on a 4 layers board
image

But is there any drawback ? I’m wondering if the trough hole connection could be affected by not having an annular ring on an internal layer.
Also you can select if there is a ring on the top and bottom layer. Again I don’t know if there is any drawback to not having the ring there.

Finally is there a way to define this option as default for any new via ?

Thanks for any feedback

I always thought annual rings are simply needed. Recently I got info from our contract manufacturer we order our PCBs assembled (we send documentation, he orders PCBs and elements) that PCB manufacturers now can make PCB without annual rings at not connected layers.
That suggests me that probably not all PCB manufacturers can do it.
Don’t know anything more in this subject.

I don’t know of any restrictions for removing annular rings on inner layers. I’m not sure about the outer layers though. Normally PCB’s are first drilled and plated, and etching of tracks is done later. I don’t know how they prevent the etchant from getting into the plated holes, and the annular rings on the outer layers may be important for this step.

There is a potential problem with tolerances. Specification of a 0.2mm annular ring is quite common, while copper to copper clearance can be smaller. There is also some ambiguity about what sizes are actually specified. Most common is that the CAD data is interpreted as “finished hole size”, which means that the drilled hole ( = before plating) is a bit bigger. If annular rings are used, then those rings are in the same gerber layer as the tracks or copper zones and tolerances are of much less concern.

Imagine how internal layers are etched. Don’t they are outer during that process? So what you think about annular rings for outer layers may apply also to them.

I’m guessing they etch the inner layer before drilling, then stick the prepreg together, then drill, then plate the hole. And finally etch the outer layer.

they can’t drill the inner layer before, as I’m sure all the layer must be stuck together before drilling.

I’m not sure if the plating is before or after etching of the outer layer.
If the etching is done last, then there must be some resin applied to protect the plating.

In any case, I think that I’ll keep the annular ring on the outer layer, as it also make it easier for debugging the board if needed.

It can be done, and it is being done. It’s called a buried via. If you go that way, then you have to know the layer stackup and order in which the PCB is manufactured. But more common is that all holes are drilled though the whole pcb in a single drilling step.

Hi,
yes for the buried via.
But here I’m looking to use the cheap manufacturing of JLCPB. And they don’t do buried via (which would involve extra step).

I’ve asked their technical support, but their answer is not very helpfull :
“please kindly note that you could remove annular ring on a via if you want, it is up to you, but if you need the via be plated, just need to make the via is on the copper area”

Well I’m guessing this mean that the annular ring is not mandatory on layer where the via is unconnected.

If you turn it around: Can you think of any reason why an annular ring would be useful for an inner layer if a via has no connection to a track?

I was thinking about the plating process. But you are right once the layer are stuck together, the drilling is done. If there is no annular ring on a inner layer, it’s exactly the same situation than a via on a 2 layers board. So there should not be any issue for the plating even if the via is only “connected” on top and bottom.

The copper thickness is small but bigger then 0. I just don’t know if there can happen chink if there is no annular ring but there are other copper, at the inner layer, on all sides of the hole. If it can happen then it could be the reason for break in plating a hole.

It’s a valid point… I don’t know either.
Obviously there will be copper all around the via, because the inner layer are mostly filled zone.
The zone will not go to the edge, due to the hole clearance.

I’m thinking that any gap there would be filed by the glue that hold the layers together.

An annular ring in an inner layer is not required.

The holes are drilled after the board is stacked up and laminated. Any hole (or, for that matter, any surface) on the board gets plated with copper. Then the outer layers are then masked and etched.

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