"Via location violates DRC" for via-in-pad

[mrsquid]

Hi all!

I am designing a PCB with a BGA (0.5mm pitch, 0.3mm diameter balls). To escape some of the balls I need to use via-in-pad, but when I try to place my via on the pad I get “Via location violates DRC” and am unable to place it. I have played around with the constraints in the board properties, but I cannot find a specific constraint that controls the distances vias need to be from pads (which I suppose is what this warning is about). I think it may also have to do with the proximity to other pads. How can I allow via-in-pad for my design? Here is a screenshot of my situation:

[craftyjon]

Can you share the project?

One thing you can do is place a via elsewhere, then move it (M command) on top of a pad, then run DRC to see what rule it is violating

[mrsquid]

I found the problem - my netclass had different design rules than the board setup. I did not realise that the default netclass rules would differ. Thanks @craftyjon to pointing me to the DRC checker (as you can probably tell I am a total noob when it comes to EDA and KiCAD).