(V6) PCB Editor: rough edges on copper pour

You can comment and give this example in Real arcs (circular segments) in gerber export (#4651) · Issues · KiCad / KiCad Source Code / kicad · GitLab.

Meh, not too keen on signing up with github right now…

I apologize up front for a seemingly snarky comment but, there is much truth in this:

In our ‘iPhone’ world of technology and numbers beyond 64 bits, we (not me) look at a number or, in this case, a graphic and see a problem. Or, so we think it’s a ’problem’

• Those bumps will not be seen on the actual PCB - you’re looking at a blow-up graphic. They are little-more (if at all) than what the actual PCB making process will naturally produce given machine accuracy and cost…

Say what you want about my comment but, my first engineering job used Slide-Rule and somehow my stuff is still flying in outer space… And, hasn’t yet fallen to earth…

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It’s not github. It’s Gitlab.

I also consider it a very bad practice to design your PCB right to the edge of what your manufacturer specifies, so I do believe that tweaking your output settings a bit is also in order.

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@JeffYoung, many thanks, this was exactly what I was looking for. I’ve set it to 0.001 and the results are better, though not ideal. Apparently KiCad won’t go lower than 0.001. As suggested in the first reply, KiCad changed to using arcs would be ideal solution.

@BlackCoffee, yes, as you’ve already said, your remark is snarky. And patronizing. I have the impression you haven’t even understood my initial post as the rough edges lead to misclassification of the board, leading to higher cost. If that wasn’t the case, I could care less about the rough edges for the exact reasons you mentioned.

@paulvdh, designing right to the edge is exactly what I’ve not been doing. I’ve left just enough space between two traces to allow the area to be filled. Sure, you could argue I’ve designed it to the edge regarding the possibility to fill accurately but then we are getting even further off topic as I was merely looking for a simple answer though I won’t reject viable alternatives. I generally spend a major part of my time not to have traces spaced at the minimum but leave gaps wherever possible for a best possible ground distribution. See here:

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@flum what version are you using? Those look worse than they should…

If a difference of 5 micrometer pushes your PCB into a more expensive class, then you are cutting it quite close regarding the clearance you’ve specified in your PCB. And this clearance is another topic from the GND separation between your tracks.

One mil is 25.4 micrometer and 5um therefore is only 0.1968504 mils.

And add some measurements.
I’m guessing these features are quite small, which makes rounding errors relatively coarse.

The two arrows in the first picture are from a related, but different issue.
Here the “minimum width” of the zone is violated, and therefore KiCad does not fully draw the zone in between, but the “rounded” ends of the zone parts are still overlapping.
It’s quite common to see this in for example zones that sneak in between the pins of DIP IC’s.

It’s version 6.0.1. No nightly build.

Huh. That should have all the fixes I’m aware of in it…

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What fixes are you referring to?

PCB Editor: Router track minimum clearance (#9833) · Issues · KiCad / KiCad Source Code / kicad · GitLab is the last one I remember.

To everyone who asks “Why does KiCad not get my use case correct?”, this is the answer.

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@Seth_h, Well, I did sign up in the meantime. I am not fond of being forced to sign up with a third-party site for filing bugs requesting enhancements or improvements but I can see why KiCad wants to outsource this. After signing up, I found out that someone already added my use case to the example. D’oh!

Evil! …

@JeffYoung, @Seth_h, BTW, I didn’t realize this thread would draw so much attention from the developers. So let me take the opportunity to thank you for the great work you are doing and the service you are providing to the worldwide community with KiCad. Years ago I wasn’t ready to jump ship when I tried it and I had to spend the money on a tool that I hardly used instead. I recently realized I have to switch to 6 layers and I am not willing to go for a design tool with a lot of features that come at a premium but that I don’t use. So KiCad is the perfect fit for my purposes. No autorouter needed here.

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I know who it was! :grinning:

We’re not system administrators, so anytime we would spend on dealing with setting up and maintaining an issue tracker is time we don’t get to spend making KiCad better. Most users appreciate this trade-off.

Especially to a decent, open source company like Gitlab

When you have time, you should add your board to that issue as the image doesn’t help is to debug the problem

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@Seth_h, OK, done <need to fill 20 characters here>

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Some time ago I was discussing zone arficat similar to the one indicated by the arrows in the original screenshot. In my case, changing the Zone fill strategy from “Smoothed polygons” (default) to “Mimic legacy” improved things. You can try to change this setting and check if it works for you.

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