Hi Andy_P. First, thanks so much for dedicating considerable time to this thoughtful reply. I appreciate your experience and willingness to share it.
That said, so far as I can tell, your reply has a number of crucial details incorrect.
“Define as power symbol” … changes the symbol’s Reference field to #PWR and hides it
“Define as power symbol” does not change the symbol’s Reference field. That field has to be entered manually. In particular, the “#” has to be prepended manually. (Being the “#” which tells CvPcb not to link the symbol to a footprint.)
The symbol’s Value field is what is used to name the net. So you don’t confuse yourself, the symbol’s name should match the Value field.
First off, so far as I can tell, the symbol’s name IS the Value field. At least, hover over the symbol name > E > Clarify refers to it as “Field Value”, and invokes the Component Name dialog. And that becomes the name of the component when the listed in the library browser.
Next, and probably most important info in this entire discussion:
So far as I can tellThe Component Name (aka Value Field) does not name the net that this power port connects to. Instead, it’s the name of the pin that determines the name of the net.
This can be demonstated by creating two power symbols as follows:
Component Name: (Field Value): PwrA
Reference field: #RefA
Pin Name: PinA
Pin Num: 1
Pin Electrical Type: Power in
Pin Invisible: yes
Component Name: (Field Value): PwrB
Reference field: #RefB
Pin Name: PinA
Pin Num: 1
Pin Electrical Type: Power in
Pin Invisible: yes
Note that the Component Names are different but the pin names are the same (and invisible).
Use these on a schematic to connect components:
U1-1 POut1 (Power out) --> PwrA
PWRA --> U2-1 PIn1(Power in) Connects to U1-1 as expected
PWRB --> U3-1 PIn1 (Power in) Connects to U1-1 due to matching PinA on PwrA and PwrB
ERC and PCBNew ratsnest verify what I describe. As does the netlist:
(nets
(net (code 1) (name PinA)
(node (ref U1) (pin 1))
(node (ref U2) (pin 1))
(node (ref U3) (pin 1)))))
In short, the underlying KiCad mechanism that links the power ports is the same “invisible power pin” mechanism that is now thoroughly deprecated on regular components.
That doesn’t cast any shadow on power ports’ use of hidden power pins. When hidden power pins are provided on real components, they auto-connect the real components’ power pins to some net that was pre-chosen by the component author, and that’s not explicit on the schematic – which limits flexibility of using the component, and can be catastrophic if not noticed. Instead power ports afford an explicit connection from real component’s visible power pin to a net of your choosing, and provide a hidden connection only between same-named power ports. (Assuming power port has been named the same as its pin.)
Understanding all this (I think!), for sanity’s sake, one would certainly want to give the power port component a Name (aka Value) that matches the name of its one pin. But it’s not the Name/Value of the part that accomplishes the connection to the net, it’s the pin name.
For what it’s worth, the PWR_FLAG component has the following settings:
Pin name: pwr
Electrical Type: Power output: Satisfies the ERC check. (And fails ERC if the net to which it’s attached is connected to another Power output somewhere.)
Pin Visible: yes! (Prevents auto-joining to a net, unlike other power port symbols!) But actually the pin itself does not appear on the schematic due to zero length and symbol-level Pin name and Pin number set to invisible. Instead the PWR_FLAG appearance is provided by polyline.
OK, I hope I got all that right, and that this contributes to refining the docs on these issues. Thanks again for your willingness to engage.
– Graham
