Hi,
I’m a recent kicad user, so my question might be silly or erroneous, but here it is: I’ve recently made a PCB from a schematics in which I used a charge pump voltage inverter (to provide a negative reference to an opamp). That gave me a -5V point from standard passive parts (Diode and capacitor, both connected to each other). I’ve put a -5V power symbol on the cable, but failed to notice that it was not connected to the wire, just sitting on it. So when designing the PCB the rastnest didn’t show the connection between the -5V net and the opamp, and hence my opamp was not supplied with a negative power rail.
I didn’t give it enough attention I suppose, so I didn’t see it when designing the PCB, but I was disapointed to see that the DRC did not react to a “power label connected to nothing”. Is it a bug? I assume only pins are checked for proper connection and no pin was unconnected here, there was just a label not used.
That’s just a proposal to avoid the same mistake again: would it be possible to add such a verification in the design rules check to the schematics?
Can you share your schematics please?
Do you mean the .sch file or just the image? Here is an image, I’m not allowed to upload a .sch file…
The problem comes from the right NegSupplyPWM, intended to serve as negative rail for the opamps.
This should have been detected by an ERC check. It seems orphaned nets don’t even make it into the netlist, so there is no way for the DRC to catch it.
That’s what I thought, and that’s why I reported, as a bug or a feature request…
For now I just take extra care when using labels/symbols, not just merely putting it on a wire. 
Cheers
Well, did You press the DRC button in eeschema?
If yes, it is a bug. If no, then it was human error.
I was able to replicate this. If at least one label of the group is connected to a net, all the other instances of the same label are considered connected, which is kind of logical, it is what labels are supposed to do after all.
So if you have one label hanging in the void, the ERC won’t catch it because the other label is indeed connected and provides the net name to an “orphan”. I am not sure it will be accepted as a bug, but I see why adding this additional rule to the ERC could make an appropriate feature request
Well as a developper I can understand the explanation and why it could be considered a normal behaviour. As a user though I’d expect the ERC to ensure me that the schematics is correctly connected and therefore the PCB I design is conform to the connections.
That being said, every tool has its little traps, and I wouldn’t have encountered the issue if I hadnt’t used two labels -5V connected to both opamps. I’ll just be extra careful in the future about the power symbols connections. Just a little trap for next newcomers.
@Matthieu
Sure, this addition to check rules could be beneficial, no doubt!
Just few remarks regarding your schematics: in Kicad it is good to avoid connecting wires directly to the pins at 90°, especially when there are more than 1 wire connecting there. Kicad will not place junction dot in this case which looks weird and can be misleading. You have several places like this in your schematics.
The same goes for connecting two pins of different components without the wire between them, I try to avoid this.
Thanks Dolganoff, I appreciate any info regarding do’s and don’t’s with Kicad.
By the way, I take the opportunity here to say that I began using kicad quite recently and I’m a big fan of it. I’ve begun electronics as a hobby 2 years ago, and my favorite program was Fritzing (of course?) untill few months ago. But adding parts in Fritzing is a pain and it seemed rather messy sometimes. I switched to Kicad when I felt ready for more complexity, and I don’t regret it at all.
Plus, this forum looks really nice and full of helpful advices…
Well, that was the thank you moment…
So thanks 
Cheers
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