Unconnected pins in V8.0 when loading V7.0 schematic

When opening a V7 schematic in V8 ERC is randomly reporting unconnected pins at locations that were previously connected fine in V7. I strongly suspect roundoff error or something to do with hard vs. soft metric conversions as one resistor that had one pin that stubbornly would not report as connected even though it behaved like it was connected (traces would ‘rubberband’ correctly when symbol was moved with the G command), even though moving the symbol and rewiring it still refused to report as connected although it behaved like it was connected. Looking in the file with VI the position of the property “Reference” for R2 was (68.58 50.7999 90). Strangely enough, when I edited 50.7999 to 50.8 now the bugger reported being connected fine. So I suspect the problem is either in the ERC analysis or somewhere where UUID’s of parts and their pins are manipulated. Even though they physically act as if connected I’m uncomfortable going to place & route with ERC errors.

Are you able to upload a example project?

Unfortunately it’s proprietary, I can’t share any of it at this point. I’ll see if I can find another example where this is happening. I didn’t file a bug report yet because I wanted to see if anyone else on the forum has experienced anything like this.

After playing with it a bit, it seems that simply deleting the part and re-instantiating it solves the problem. Not sure why but at least the symptoms can be treated successfully.

Hold the phone, after saving the schematic then reloading it, the errors return. I’ve found the same issue on other designs that were imported from CADSTAR. There is evidently some issue possibly with symbols that were imported from CADSTAR. So I’m digging a little more deeply into this.

And just to continue the replies to myself, I generated a netlist to take a look and sure enough, the connections ARE missing even though it looks like things are properly connected in the schematic, so the ERC is right. Some things aren’t connecting even though they look connected. Working on a test case for y’all…

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Meh, to verify problems like this, all that is needed are a few resistors or similar. You can also change the PCB outline, remove the rest of the parts and use Save As… to give it a different name.

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