Here’s the typical scenario. I change the schematic for an existing project in Eeschema, save, and export the netlist. Then I import that netlist into an existing board design in Pcbnew. In addition to whatever changes I made to the circuit, Pcbnew will duplicate some, but not all, of the unchanged components. It seems to be the same ones each time.
I’m using KiCad 4.0.6 from Debian.
Any help tracking this down would be greatly appreciated. Thanks!
Answering my own question: The duplicated components are those for which I had modified the designator on the PCB. Setting it back to what’s on the schematic solves the issue. I’ll just hide the designator and write custom text on the PCB.
What happens if you select change for exchange footprints?
What happens if you select by timestamp for footprint identification in combination with delete for extra footprints?
In other words play with the settings of the netlist import rather than using a workaround that means your schematic and pcb get out of sync. (Believe me this workaround will bite you later on.)