This seems like a very simple issue, but I’m having a particular tough time solving it. I have a series of analogue traces which connect to a QFN ADC. I’ve established a net class for these signals, with a trace width of 0.254mm (10 mils) and a clearance of 0.508mm (20 mils). Due to the size of the QFN ADC, I’m not able to route the traces to their corresponding pads, as the clearance of each trace breaches the clearance of the pad. Even when setting the pad clearance to zero the problem remains, as the 0.508mm clearance on the track is considerably larger than the spacing between pads.
I realise I can reduce the trace clearance until the conflict no longer occurs, but I’d like to maintain the 0.508mm clearance up until the pad if at all possible. Is there a simple way for reducing the clearance requirement for the final section of a trace as it meets the pad?