This seems like a very simple issue, but I’m having a particular tough time solving it. I have a series of analogue traces which connect to a QFN ADC. I’ve established a net class for these signals, with a trace width of 0.254mm (10 mils) and a clearance of 0.508mm (20 mils). Due to the size of the QFN ADC, I’m not able to route the traces to their corresponding pads, as the clearance of each trace breaches the clearance of the pad. Even when setting the pad clearance to zero the problem remains, as the 0.508mm clearance on the track is considerably larger than the spacing between pads.
I realise I can reduce the trace clearance until the conflict no longer occurs, but I’d like to maintain the 0.508mm clearance up until the pad if at all possible. Is there a simple way for reducing the clearance requirement for the final section of a trace as it meets the pad?
No. There are complicated ways. You can for example use net ties, i.e. divide a net into two and set smaller clearance for the net nearer the QFN.
There has been developer discussion about allowing different rules for different areas. That would be in 6.0 at earliest, so it would take several years.
Thanks for your input, it is greatly appreciated. I had figured this might be the answer. I’ll play around with the options you’ve mentioned for the time being. It would be great to have this feature in 6.0
I ran into this one too, when I was laying out some SDRAM. If it’s on the simpler side of things, you could manually do the fan-out and net-tie them, but I tried and horribly failed. (I had not much space to work with, and the interactive router would always eat my work.
I think the ideal way for it to work would be to have a mark defined on the trace where the fanout ends near a pad. The interactive router would not modify things that would violate the clearance rules past that point.
Let me know if you manage to figure out a good workaround, because I’m in the same boat.
@eelik Can you simply end the net on a set of named “virtual pads” and then connect the other side of those virtual pads with another net (with different DRs and names) to the QFN part? By “virtual pads” I mean two separate SMT pads with a trace connecting them. Something you could create in a library with a schematic symbol with named terminals and a footprint but no actual part.
If I understood you correctly that would be a set of net ties in one footprint. If that’s needed often for certain component, it could be a good idea I think. I have thought the same. It would be like a surrounding footprint around the inner footprint proper, right?
Huh, I can’t sort out how to connect two pads in a footprint and give them different labels. Kicad only thinks they are connected if they have the same name.
