Unable to fillet selcted track segments

Hi. I’m working on Linux in the latest nightly build of 5.99.
Application: KiCad PCB Editor

Version: 5.99.0-unknown-1b7358f93a~142~ubuntu21.04.1, release build

Libraries:
wxWidgets 3.0.5
libcurl/7.74.0 OpenSSL/1.1.1j zlib/1.2.11 brotli/1.0.9 libidn2/2.3.0 libpsl/0.21.0 (+libidn2/2.3.0) libssh/0.9.5/openssl/zlib nghttp2/1.43.0 librtmp/2.3

Platform: Linux 5.11.0-37-generic x86_64, 64 bit, Little endian, wxGTK, ubuntu, x11

Build Info:
Date: Oct 11 2021 22:29:57
wxWidgets: 3.0.5 (wchar_t,wx containers,compatible with 2.8) GTK+ 3.24
Boost: 1.74.0
OCC: 7.5.2
Curl: 7.74.0
ngspice: 34
Compiler: GCC 10.3.0 with C++ ABI 1014

Build settings:
KICAD_USE_OCC=ON
KICAD_SPICE=ON

I’m not reporting this as a bug because it’s probably user error.

I have a track width of 2mm. I draw a track, deliberately making sure there’s a right angle.

It appears that the track contains 2 segments plus a couple of “blobs” at the corner. I select it all using “Select All”.

I select Fillet Track with a radius of 2mm and get the message “Unable to fillet the selected track segments”.

I suspect the problem is due to the “blobs” in the right-angle corner because when I can actually create a track without blobs the filletting works.

How can I avoid the blobs at the right angle corners? Is is something to do with the grid setting?

I’m having a bit more hit than miss now by ensuring the right-angle joint of the 2 tracks is perfectly aligned by using a grid of 0.025mm. However, some tracks still refuse to fillet.

I’ve attached an example. The top line shows the 2 individual tracks selected. The second row shows that there are only 2 tracks present. Clicking “Select All” produces the next row. Then I try to add a fillet and the result is “Unable to fillet the selected track segments”.

Are you sure the segments are long enough so that 2mm radius can be used?

EDIT: or are the lengths visible in the screenshot?

Hi. The lengths are visible but here is the full board for reference. The problematic tracks are far right.

There’s nothing special visible there. But the filleting feature is new and there may be some bug. Can you zip and attach the whole project here?

Here you go.Williamson conversion MOSFET supply.zip (44.8 KB)

You were right, there are “blobs” in one corner, and in another the segment endpoints don’t collide. Your component pads aren’t in the same large pitch grid, therefore KiCad helpfully adds small segments to compensate for this while routing because the router wants to the endpoints of segments collide. Also it’s not easily possible to force 90 deg corners in all wanted locations while routing with the interactive router so that they would still be in line with the destinations (estimating is very difficult with this 0.1 mm grid).

Even though it’s possible to create arc segments on the fly by using context menu -> Track Corner Mode while routing, they can’t be easily controlled or edited in some exact way afterwards, and at least I can’t create a 2mm radius arc like that.

There’s some kind of usability problem here, but I’m not sure how it should be fixed.

@Qbort is responsible for large part of this filleting functionality, maybe he can comment on this. Could it be possible to take 3 segments (2 x 45 deg corners) and create one fillet?

Understandably creating 90 deg corners hasn’t been a priority for the end users, therefore it’s not easy in all situations. And I don’t think it would be the correct way to fix this anyway, if creating or editing fillets could be easier.

As a workaround you can change the grid temprorarily to e.g. 1mm. Then it’s easy to create 90 deg corners. They may end in the pad ugly but maybe you can find something for that.

At the moment, you can only create 45-degree arcs using the router tool (because H/V/45 is the most common routing style). In the future it will be possible to create 90-degree arcs as shown in this design using the interactive router, but that will be a 6.99 feature.

Thanks to you both. I’ll play around with it some more but it’s not an essential feature for me. Just thought I’d try it out.

You can view your tracks in “sketch mode” by clicking on the button in the left toolbar:

That vertical track segment also has a length of

74.4 - 71.425 = 2.975

and you just can’t fit two arcs with a radius of 2mm each into a track segment that is shorter then 4mm.

Same for the short segment near pad number 3.

109.275 - 107.75 = 1.52500

Those “Blobs” are a bit annoying thing of KiCad. I think KiCad makes them to connect “off grid” track segments with “on grid” track segments. Luckily KiCad makes less of these things now then it used to in previous KiCad version. One way to remove them is to first drag it a bit inwards to make it bigger, then grab it again and drag it outwards until you have a sharp corner.

I also noticed that you’re working with pretty high voltages:

image

… but you have only a distance of 1.25 mm between different nets:
image

I’m not sure what the minimum clearance should be, but I’m pretty sure it should be more then 1.25mm. I’m guessing more like 3mm.

I do see you have made a pre-defined track width of 2mm in the board setup:

But this does not specify any clearance.
To set clearance you have to go to the Net Classes part of the board setup.

The Net Classes are the main method for specifying track and via parameters. and the Pre-defined Sizes are only an “extra feature” for stuff that deviates from the normal workflow. Learn to use net classes, and you’ll make better PCB’s quicker.

I guess it is possible but it would be a new feature request as likely there would be a lot of edge cases to get right - definitely not one for v6.

The fillet tracks tool is a bit specific in what it needs:

  1. The tracks must join at the same exact point (e.g. start point of one track must equal the end point of the other). Note that this same requirement exists for several other tools, e.g. the calculation of length in the length tuner.
  2. The radius entered will be checked to ensure that it will fit. If it doesn’t fit, it won’t fillet.
  3. If there are more than one track or other object (e.g. a Pad) at the intersection point, the tool does not fillet (to avoid breaking connectivity).

Thanks. Yes, I was lazy with this little board because there aren’t many tracks. I usually do use Net Classes.

Believe it or not the recommended spacing for a coated board for 150V is only 0.4mm.

Thanks Paul. Using Sketch mode is a great tip. I wasn’t expecting to be able to fillet the those particular tracks.

Using all the advice here I was able to add fillets everywhere else.

115Vac rms = 162V peak, so the “bottom” of C2 (which is drawn backwards!) gets charged to -160V, but the AC input also swings to +160V, which is a difference of 320V.

Add to that mains voltage tolerances, possible spikes/ hazards/ surges (What’s the word in English?) and a bit of a safety margin, and designing it for 400V isolation distance would make a lot more sense.

If this circuit is directly coupled to mains voltage you also need a fuse.
Your 2mm wide tracks are not capable of handling the current that a wall socket can deliver, which results in a fire hazard when something bad happens to your circuit and lots of amps start flowing.

You’re also getting near the territory where you have to check the voltage ratings of the resistors used. I think most 1/4W THT resistors go up to 150V or 200V. It’s probably still acceptable, but you have to check to be sure.

I cut off your “because” because there are no excuses for getting lazy when working with mains related voltages.

Thanks again Paul. I just checked, recommended clearance for coated tracks at 400V is 0.8mm. I have looked up those figures before and knew I was safe. I’ve also designed boards going up to 500V with appropriate clearances of course, using Net Classes.

The power supply does indeed have multiple fuses. Mains. Low voltage and high voltage. A mix of slow and fast blow.

I had a look at KiCad’s own PCB calculator and was a bit surprised at these small distances for “coated tracks”.

There are different rules though for “just to keep it working” and “Safety related for mains voltages”.
But I do not have to get my PCB’s through any approval procedure so I never looked too deep into those.

About the fuses, maybe I was nannying too much. Having fuses somewhere else is perfectly fine of course.

C2 is still backwards though, so put on your safety glasses and watch your elco’s pop when you turn it on the first time.

Thanks for that. I’ll check it. The v5.99 nightly build capacitor footprints didn’t have any polarity indications at all. I had to edit the footprints to make one of the pads rectangular and add a “+” symbol.

I think there is still a misunderstanding.
I was not referring to the PCB, but to the schematic in post nr. 11:

The “+” of C2 should be connected to your “GND” because the other side has -150V on it. Surprisingly you did draw C4 correctly.

Thanks. All fixed. I may redo it in 5.1 anyway because I want the usual capacitor footprints.