Unable to create tracks to pin 2 of a to-92 in-line footprint footprint

I am very new to kicad. I am creating a very simple pcb in which I need a 2n2222 transistor that has a to-92 in line body.
PCBnew refuses to trace tracks to the central pin of the to-92 footprint.

I tried to reduce the track size up to 0.05mm, reduce up to zero the track clearance, switch from opengl to default tracing mode (cairo seems to not work), but all I can obtain in opengl is a track that stops very close to the pad, but doesn’t touch it. In standard mode I can draw the track up to the pin, but when I end it, it disappears. I even tried to change footprint with others got from external libraries, but with no chance.
The only thing that works is to switch the footprint to “Housings_TO-92:TO-92_Inline_Wide”.
Below my version information:

Application: kicad
Version: (2015-09-06 BZR 6162)-product release build
wxWidgets: Version 3.0.2 (debug,wchar_t,compiler with C++ ABI 1002,GCC 4.9.2,STL containers,compatible with 2.8)
Platform: Linux 4.1.3-nrjQL-desktop-1rosa x86_64, 64 bit, Little endian, wxGTK
Boost version: 1.54.0

Is that a bug or it is me doing something wrong?


Did you create a schematic + netlist?

If not, the DRC (design rule check) will refuse to make any connections.

Hi Andrea,

Could you send us the PCB file showing the issue?


Yes do you need the whole tree or just the layout file?No matter, I saw that the whole tree is small, So I supply the links for the working file with the large TO-92 footprint and the link to the not working file with the narrow footprint.
Not Working

Thank you for your help


Hey andrea,

just checked out your design files. It seems to me, that the required clearance around your pads is way too big (the “auras” around your pads). You should check out your design rules and minimize the clearance.

I second Rex’s answer. The pads in the narrow footprint are too close - if you visualize their clearance areas (in OpenGL you can switch the router to ‘Highlight Obstacles’ mode), you will see they are too close to each other. You can override the pad clearances to be smaller than the global clearance settings in the ‘Pad Properties’ dialog.


Well, or you could just adjust the net clearance rules. 0.8 to 0.5 mm is way too big. Most PCB manufacturers start at a minimum clearance of 0.2 mm. If you change these in your design rules dialog, you’re good to go.

Thank you all, I solved my problem.
But let me understand how the clearance works.
A stated in in my previous posts, I made several temptatives reducing the width of the tracks going to the transistor and their clearance. In particular I set the clearance as low as zero.
I did this inventing new net names as the tracks I needed to modify didn’t have a net name. I then copied such track widths in in the list of the available track widths to have them available while tracing new tracks.
What I understand now is that changing the track width on the fly changes only the track width, but not its clearance. Am I right?

The clearance of a track and pad are first and foremost defined by the net (net classes editor). If you look closely, you’ll find that you can enter custom track widths there as well (global design rules), but that doesn’t affect the track-clearance.

You can override the clearance values of pads in the pad settings (Local clearance and settings).