Unable to create solid fill zones

Hey guys, Im super new to KiCad and am facing this really bad problem of not being to make a solid fill zone on 3 different pads of same potential (VDDA). A fairly detailed explanation would be really helpful as im still a beginner.

If you observe above the problem zone, there is a solid fill and it is for 2 decoupling capacitors at +3V3 where it works. But the below VDDA pads, the problem area is between an inductor and 2 capacitors. Is that the reason?

Most typical use of zones is to have them as big as whole PCB (or at least comparable in size).
If zone is so small that may be some filling rules don’t allow it to be filled. It can be thermal relief clearance. If thermal relief connection collides with the other pad thermal clearance it can’t be done.

Just don’t use zones for such purposes as you are trying. If you want to have wider connection than use wider tracks. Somewhere in Board Setup (I don’t have KiCad here so write from memory) you can set a list of width you will be using (I think that my typical set is 0.2, 0.25, 0.3, 0.5, 0.7, 1, 1.3, 2) then when routing you can select the width (selection box at top left).

File > Board Setup > Predefined Sizes > Tracks.
I have Kicad open in front of me. :smiley:

Here is a link for @vmskrshn : https://docs.kicad.org/