Turn off GND airwires


Hi All

Is there a way to toggle visibility of the GND airwires in the ratsnest? It would be much easier to do a layout if only the connections to other parts were shown, rather than those connections to a larger net where the connection can be routed to multiple places. For example, if I’ve got a capacitor that has to connect to an IC and to ground, it would be good to have it only show the connection to the IC, as the connection to ground is less important for placement.


Tips on pcbnew workflow…?

Nah, and for good reason I’d guess. I’d hate to miss routing a net because I forgot to enable it. Once you have your ground pour and drop vias to it, those lines should go away though.


Along the same lines, I want to prevent the GND Net from auto-routing since I have both top and bottom copper-pour layers (GND zones), so finding the nearest connection point from any component to these zones should be easy (2 layer PCB).

The autorouter however decides to connect ground pins on opposite sides of the PCB by long meandering tracks which takes up valuable signal routing space.

Is there a way to remove/lock out the GND net until I have finished all the other nets?

(I have even contemplated editing the NET file, removing the GND net and then adding it back in the end)


Interesting question, selective Viz on NETs could be useful, but I’m not sure it is a placement tool, as the GND routing some consider more important than the other end.

I would agree the Autorouter is best left to deal with Short & Simple nets.
As for “finding the nearest connection point from any component to these zones should be easy”, that sounds optimistic, especially on 2 layer PCB.

On those designs, I tend to route GND to guarantee pour connections, and I also shove traces to give maximal-pour areas - that means, invisible ground is not a good idea.

All that said, I took a .kicad_pcb file, and did a simple quick Text Editor global search/replace of
replace with the null net field
0 ""

and loaded that, just to see what happened.

Voila: It imports fine, minus GND rats connections.

Note that any routed GNDs will now cause DRC errors, as they lack Net-Name Trace-Pad validity.

'You can then import the superset Full NET info anytime, on top of this, to add GND (do not forget ! :wink: )

I had a quick scan for possible Python Script support to do this, and I can find only partial support of
GetNet, SetNetCode, GetNetname

but no SetNetName ? I did not test if SetNetCode to 0 on a 2 GND was valid.


In my imagination I speculate that the initial component placement task would be easier if you could disable the ratsnest display of GND connections, just to reduce the amount of visual clutter on the screen. Same could be said for other nets with many nodes, such as power rails. If it’s a multilayer board with dedicated layers for ground and/or power connections, the ratsnest lines that will be connected on a dedicated layer are probably a hindrance to efficient component placement than a help.

Even on a two-layer board my personal working style generally starts out with at least a mental image of how I’ll distribute power and ground. As I initially place components I give most of my attention to signal routing, and mentally almost ignore the ratsnest connections to power and ground.

But I don’t recall ever having a tool that could omit some nets from the ratsnest, so I don’t know whether or not my fantasies would live up to reality. I definitely would NOT want the undisplayed nets to be ignored by DRC, unless it was a general DRC option to “Check all track widths and clearances but ignore any unconnected nets.”.


p.s. - I also make explicit trace connections to all nodes in a net before I fill copper zones. I think that was required by some tools I used in prior incarnations, and it just seems like the safest thing to do.

Fab thinks board has short circuits, but it passes DRC

I don’t think it would be a very good idea to be able to disable/hide individual nets of the ratsnest. It is certainly a bad idea to remove them from the netlist. The ratsnest itself could definitely be improved however. As it is it does not always draw connections to the closest point of the net. In my opinion all layers should be considered when drawing the ratsnest to keep the ratsnest lines as short as possible by assuming vias could be used. Perhaps it could even check where a via can be placed, then as you draw traces these (virtual) via locations would move. Then the ratsnest would be a more useful aid for both component placement and layout. If you place a zone on one layer as your ground plane and assign it the GND net then most of the ground “wires” would reduce to short little stubs protruding from the pad to the closest possible via location.

Although I seldom ever use an auto-router I would manually route nets such as ground and power and any other important traces before running the auto-router.

Routing of power and return (ground) nets is at least as important as any other signal especially with faster digital logic signals. Anytime you use a via you are usually punching larger clearance holes through planes on other layers. Too many of these holes in one area makes a much bigger “hole” or slot in the plane. These discontinuities in a plane (especially the ground plane) can cause problems when you cross them with signal traces on other layers. They cause impedance mismatches which can cause reflections, they affect propagation delay, etc.

Vias are usually more difficult to place than traces so when you know you need them, such as connecting to a power or ground plane, it is often best to place them first, or at least very early. When it comes to things like decoupling caps, the wrong placement of a via to either power or ground when space is limited can render the cap useless.


A better solution would be to be able to highlight several nets, leaving the rest visible but not hiding the ones of interest


I know its not a good thing to reply to older posts but someone might read up on this. I’m new at using KiCad and have spent a few weeks on it. Too many hours to count.

I found a simple way to get rid of both the ground and supply airwires. Make a copper pour for each around the whole board and the lines disappear, once the “do not show filled areas in zones” is selected on the left of the screen. Don’t forget to refresh the zones with the “B” hotkey. The hotkey also will get rid of the lines that reappear if a component is moved.

I tend to make copper pours anyway.

Great program.


ORCAD has this function and I find it quite useful. However, I like the more intuitive KiCAD interface on most other controls. I would definitely like to see this feature in KiCAD.


Eagle has it too. Terribly useful feature. I know I’ll do GND via a pour. I want to do the pour last. It’d be great to not have to see the GND ratsnest while I’m working on all the other routing.