Track to filled zone: DRC reports unconnected end

I’ve got a 2x20 connector where all ground connections are on one side of the connector. The inner layer is setup as a filled zone ground plane with pad connections as thermal reliefs. To get a more direct path to ground, I’d like to create tracks from the ground pins to the ground plane fill zone on the other side of the connector (for example, from pin 32 routed around pin 31 in the screenshot).

DRC reports this as an unconnected track end. And I can understand why- the tracks terminate on the filled zone that the pin is already connected to. Is there anything I should be doing to inform that “this is an intended connection” to appease DRC?

You need to make a transition hole through the track at the end of your path.

A hole shouldn’t be needed. This may be a bug. Can you share the project or create a minimal example which you can share? And give the version information from Help → About → Copy Version Info.

Here’s a smaller version of the project with most everything taken out. I get the same behavior on MacOS with 6.0.11 as below. I can paste that “About” info as well if that’d be useful.

example.zip (120.5 KB)

Application: KiCad PCB Editor

Version: 6.0.7-f9a2dced07~116~ubuntu20.04.1, release build

Libraries:
wxWidgets 3.0.5
libcurl/7.81.0 OpenSSL/3.0.2 zlib/1.2.11 brotli/1.0.9 zstd/1.4.8 libidn2/2.3.2 libpsl/0.21.0 (+libidn2/2.3.2) libssh/0.9.6/openssl/zlib nghttp2/1.43.0 librtmp/2.3 OpenLDAP/2.5.14

Platform: Linux 5.17.0-1030-oem x86_64, 64 bit, Little endian, wxGTK, ubuntu, x11

Build Info:
Date: Jul 26 2022 19:32:41
wxWidgets: 3.0.4 (wchar_t,wx containers,compatible with 2.8) GTK+ 3.24
Boost: 1.71.0
OCC: 7.5.2
Curl: 7.84.0
ngspice: 36
Compiler: GCC 9.4.0 with C++ ABI 1013

Build settings:
KICAD_USE_OCC=ON
KICAD_SPICE=ON

You should probably try to reproduce that with the newest kicad 7 version. There probably won’t be any more updates for kicad 6.

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Is the zone set to the GND net ?

image

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@Jonathan_Haas - you’re not wrong about switching to v7 and retrying. I’m hesitant to do a major version bump mid-design. Perhaps that’s unfounded. And you’re also right that I shouldn’t expect an update to v6 if this is an actual issue. I was anticipating it’s a user error thing but maybe that’s not the case.

@RaptorUK - thanks for checking on that, both zone & track are GND. Including a screenshot incase there’s something else I may have missed in the zone properties.

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I’m hesitant to do a major version bump mid-design.

That’s fine we understand your fear.

Install kicad 7, try It. If It works stick to it, if not discard and continue…

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Instead of the traces, how about reducing the ground plane clearance around the unconnected pins? That is effectively what you are doing by routing tracing between the unconnected pins.

Another idea is connecting the unconnected pins to ground.

Now you get all practical on me with a suggestion like that :slight_smile: Rotating the spoke angle 45 degrees on the pin and reducing clearance a bit gives a connection to the opposite side. Did that on pin 28 of the screenshot below and can do the same for the other pins. Thanks for the suggestion! Anything I should be concerned about by reducing this clearance? Hoping to send this off to JLC in a few weeks.

In other news I can confirm I no longer get the DRC error with kicad 7; it must have been fixed somewhere along there. Thanks for the help all!

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The fab house gives you info about the minimum clearence allowed.
At my fab house 0.150mm is a the minimum for standard class. Smaller clearances are possible for higher prices. If any possible, I do not fall below 0.200mm.

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You can also reduce the thermal relief gap around the grounded pins. However, this may cause manufacturability (cold solder joints) issues on the grounded pins because the spokes create a path for heat dissipation. This can be remediated by making the spokes narrower.

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