I had read at TI design rules that 45 degrees are not preferable as compare over 90 degrees, but it doesn’t really matters if I am using voltage less than 1kV.
But to make the PCB so perfect I need not have this angle issue but it generates when we use freerouting software, it routes some of the track even at 90 degrees. Why so?
And how it is possible to do impedance matching Kicad?
45 degree possibly allows a shorter connections between 2 pins from A to B in average than being limited to 90 degree only. Regarding the complete design, this gives less occupied area and possibly smaller boards using higher density. Can’t see any disadvantages for 45 degree against 90. Maybe you can link the TI rules mentioned. The view is different if you have to decide about a preferable track direction for a layer as horizontal or vertikal. Some designers use this strategy to keep the direction open for other traces but such rules are useless at the board edge
If so then why Kicad routing doesn’t support this.
It should support, I think so?, Please correct me if I am wrong.
Freerouting generates 45° tracks for me and always has. Maybe you need to adjust some setting, dunno what.
BTW here’s a post on the 90° myth: https://resources.altium.com/pcb-design-blog/pcb-routing-angle-myths-45-degree-angle-versus-90-degree-angle
Thanks @kenyapcomau for responding, I read the same article yesterday, I hope it is not a myth and somewhat true as well, as I had discussed and realized using DSO waveform, there is an acid trap at 90 degrees joint.
Here is the link which I read given at TI website: http://www.ti.com/lit/an/slva680/slva680.pdf
@kenyapcomau, can you please let me know which Kicad where do you use and which freerouting software do you use.
Thanks once again to @janvi and @kenyapcomau.
You asked about freeRouting before, don’t you remember my reply? As I said I recommend Kicad v5.1 (5.1.5 currently) with freeRouting. The jar file I most recently used is the one that’s included in LayoutEditor, but I will use https://github.com/miho/freerouting next board I make.
Fortunately I started with v5 and skipped the v4 -v5 transition.
This is one of the strategies to gain sonn 100% routing. Strict horizontal / vertical alignement using via for each 90 deg corner. Later optimizing the via count if possible without loosing any connection.
The application note deals with ESD and this is not asking if your design uses less than 1KV. For my understanding the application recommends opposite from your post (to prefere 45 deg)
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In Figure5 notethat for a 90° corner,the corneris a strongsourceof EMI.
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Reason is impedance change for diffrent track width in the corners where 90 deg has more diffrence than 45 deg and curve design have no thicker areas or impedance change along the trace. Dealing with ESD you fist have to consider the things around your PCB. For working ESD protection you first have to understand common mode current compensation by dual inductors and how they protect from outside. Second avoid capacitive coupling by virtual gaps in the design. After that, its more easy to understand the TI application
A 90 degree rule on different layers makes a crude autorouting program much easier
I don’t like 90 degree tracking, 45 degrees allows lower strays
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