When I fill in the GND zone on my PCB one of the traces does not figure in the process
Trace in question runs from UI/6 to R1/2.
I went back and re-drew all the traces with the same result. Why would that one trace not register?
Trace in question runs from UI/6 to R1/2.
I went back and re-drew all the traces with the same result. Why would that one trace not register?
What do you mean with âdoes not registerâ?
Did you accidently get that trace on the 2nd layer of the board?
The colors look âoffâ from default, so that makes it a little hard for me to know for certain.
Or, hit the Hotkey âbâ (lowercase).
Or, isnât pin-6 supposed to be be ground, and it is already connected by the fill.
That trace seems to be absorbed into the fill zone. Which net did you intend to assign to the fill zone?
(Yes, I know this is a tutorial intended to demonstrate how to perform some common tasks in KiCAD - not an example of microcontroller application development. Even so, it seems odd to assign the fill zone to a general purpose I/O pin.)
Dale
There does not appear to be any other pins of the MCU assigned to the fill zone.
If that pin is in fact a GPIO pin, something is wrong in the schematic.
The schematic would appear to be just fine. The zone is assigned to the wrong net. Edit the zone properties and change the net to âgndâ.
Tell me Jim, where in the schematic would you expect to find any properties relating to the zone?
Edit: Of course when you do change the zoneâs net to âgndâ the track from J1-3 to U1-8 will then merge with the zone, but that will at least be okay.
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I took the initial OPâs statement to be true.
Looking closer, I see that Pin-3 of conn-3 is not connected to the GND pour.
The screenshot wasnât that great in quality.
The zone is connected pin-6 of U1 and R1; I canât tell the net name.
From what I can tell the trace from UI/6 to R1/2 is ground (see the R1 end has thermal reliefs)
If I do the same thing and the select the specific ânetâ it shows up in a slightly different tone (of the same color). Perhaps this is how the screenshot came about.
To make sure we are all seeing the same thing, please clarify that statement.
The screenshot I see in the original post shows R1/Pin2 connected to the fill zone with some thermal reliefs. (Similarly, U1/Pin6 connects to the fill zone with two thermal reliefs. One of them is difficult to see in the image, and the other one is beneath a trace.) However, the fill zone is NOT connected to the net named âGNDâ.
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The net named âGNDâ includes two nodes: U1/Pin8, and J1/Pin3.
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The net connecting U1/Pin6 with R1/Pin2 appears to be called âINPUTâ. If it is also called âgroundâ, please tell me where to look for this designation.
Dale
When I restarted KiCAD things had changed a little. The GND zone now looks like this
and if I zoom in a bit I get
which appears to show U1/6 and R1/2 both connected to the zone - which would have the correct effect.
Is that correct?
Can I etch this design with the expectation that it will work properly?
Without running a true DRC, it appears that any board manufacturer with current processes should be able to successfully etch and drill your board. You havenât given us the criteria to judge either âcorrectnessâ, nor âproper operationâ.
I will speculate that this circuit is intended to illuminate, or darken, an LED in response to a logic level applied to the âINPUTtoRâ connection (J1/Pin2). I will guess that somebody has loaded firmware into the microcontroller which executes this task. (That includes configuring the microcontroller to activate an internal clock circuit - since I donât see any provision for an oscillator driving the uC - and resetting the uC on application of power - the RESET pin is likewise unconnected.)
It is VERY unusual to connect a uC general-purpose I/O pin (U1/Pin 6) to a copper pour. In essence, you have hung a large antenna onto that pin. That makes it susceptible to stray signals floating around its environment (commonly called RFI - Radio Frequency Interference) as well as static discharge (ESD). If it was my circuit design, I wouldnât leave ANY uC I/O pins floating - Iâd add a pullup or pulldown resistor to every unused pin.
Dale
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Still itâs not GND zone, the zone is connected to INPUT net. Again, change the zoneâs properties so that it belongs to GND net.
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I donât understand what you say about a ânetâ, but, anyway, it seems a bit late to change the zoneâs properties now.
There is a good explanation here http://kicad.txplore.com/index-p=189.html about zones and a walk through. It isnât too late to change your fill zone to the correct net - unless you have already etched the boardâŚ
When I used the term âcorrectâ I was referring to my interpretation of what I saw when I zoomed in. As for âworking properlyâ or whatever, I am confused with the product of my work with KiCAD. I expected all the traces to be individually outlined - not have one which was spontaneously converted to a âzoneâ.
As far as what this circuit would achieve, were it to be constructed, that is not relevant. I think the book âGetting Started in KiCADâ puts this exercise up as a means to illustrate PCB design and layout using KiCAD. I donât think the circuit was ever meant to be built. In that case the addition of more capacitors or resistors as people have recommended in merely academic. For a retired Mechanical Engineer like myself who is simply pottering around in electronics in an effort to stave off mental ossification, the idea is to learn how the package (KiCAD) works so that I can use in in an actual project (this is planned so brace yourselves for a barrage of my silly questions 
).
My previous question remains. Have I interpreted this correctly (as seen in the zoom in): the trace from from U1/6 to R1/2 is replaced by the zone?
Iâll try doing the layout again and see if I can get it to work with individual traces.
Hello Rick, no, you have not implemented the zone correctly. Provided there are no DRC errors, what you have would work if you were to actually make the board. But your zone is connected to the input ânetâ when the common use for zones would be for ground or power ânetsâ. A ânetâ is simply a portion of an electrical circuit. The connections consisting of J1-1, R2-2 and U1-1 are all one net and in this case the net is called âVCCâ. The connection from R2-1 to D1-2 is another net. This is the information that is passed from EEschema to PCBNew when you generate a ânet listâ in EEschema and read it into PCBNew. You also have a net called âGNDâ and this is the net that is most likely intended to be connected via the zone.
Right click on the border of the zone and select âZonesâ -> âEdit Zone Propertiesâ. In that dialog the nets are listed in the large box at the top center. You should find that the net named âINPUTâ is currently selected. Select âGNDâ instead, press âOKâ then press âBâ to refill the zone. The track between R1 and U1 should now appear seperate from the zone, however the track from J1-3 to U1 will now merge with the zone, this is okay.
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It wasnât spontaneously converted. You have created a zone which was attached to the INPUT net. In that case all traces belonging to the INPUT net are covered by the INPUT zone. The pads belonging to that net are connected to the zone using zoneâs or padâs settings: with thermal reliefs or with solid connection. If you change the visibility settings (outlines only for zones) you can see the track is still there.
See for example http://www.ti.com/lit/ds/symlink/bq21040.pdf, 11.2 Layout Example. Itâs common to see this kind of examples for surface mount components. There are no traces, only zones.
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I just had a quick look at the Kicad tutorial here http://docs.kicad.org/stable/en/getting_started_in_kicad.html
I could not see any mention of selecting the ground net before drawing the plane
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Now we will make a ground plane that will be connected to all GND pins. Click on the Add Zones icon
add_zone_png on the right toolbar. We are going to trace a rectangle around the board, so click where you
want one of the corners to be. In the dialogue that appears, set Pad in Zone to Thermal relief and Zone
edges orient to H,V and click OK. -
Trace around the outline of the board by clicking each corner in rotation. Double-click to finish your
rectangle. Right click inside the area you have just traced. Click on Fill or Refill All Zones. The board should
fill in with green and look something like this:
Edit: I am using the nightlies, the stable version is probably a lot different.
I was in error in this statement. I should have replaced âgroundâ with Fill / Flood.
I am using V5, when I create a fill/flood area at the initial âclickâ to define the fill area a popup appears. It controls what net is connected to the fill/flood. See screenshot:.
. (this goea along with sicâs post)
To remove a flood fill from a net I had to delete the fill flood outline and start over.
Perhaps the is what happened to created the OPâs situation.
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The getting started tutorial is a bit lacking. A better beginners tutorial is the video series getting to blinky 4.0 by @ChrisGammell https://contextualelectronics.com/courses/getting-to-blinky/